AR8327-AL1A-R datasheet(377/394 Pages) ETC2

377 / 394 page

Atheros Communications, Inc.

AR8327/AR8327N Seven-port Gigabit Ethernet

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377

3.13 MMD7 — Auto-negotiation Register

Address Offset: 0x0, or 0d0

Device Address = 7

Table 3-400, “AN Control1,” on page 377 summarizes the Register

Table 3-400.

AN Control1

3.13.1

AN Package

Address Offset: 0x05, or 0d05

Device Address = 7

Table 3-401, “AN Package,” on page 377 summarizes the Register

Table 3-401.

AN Package

Bit

Symbol

Type

Description

an_rst

Mode

R/O

Reset bit, self clear.

When write this bit 1 :

1, reset the registers(not vender

specific) in MMD3/MMD7.

2, cause software reset in mii register0

bit15.

HW Rst

SW Rst

Reserved

Mode

R/O

Always 0.

HW Rst

SW Rst

Xnp_ctrl

Mode

R/O

If mii register4 bit12 is set to 0, setting

of this bit shall have no effect.

1 = Local device intends to enable the

exchange of extended next page;

0 = Local device does not intend to

enable the exchange of extended next

page;

HW Rst

SW Rst

12:0

Reserved

Mode

R/W

Always 0.

HW Rst

SW Rst

Bit

Symbol

Type

Description

15:8

Reserved

Mode

R/O

Always 0.

HW Rst

SW Rst

auto_neg_present

Mode

R/O

Always 1

HW Rst

SW Rst

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