LD5760GS datasheet(12/20 Pages) LEADTREND

12 / 20 page

LD5760

11/05/2015

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD5760-DS-02 November 2015

Vcc

VCC-ON

VCC-OFF

HV Current

2.8mA

Startup Current

Vcc current

~ 0mA (off)

Operating Current

(Supply from Auxiliary Winding)

Fig. 13

Brown in/out Protection

The LD5760 features Burn-in/out function on HV pin. As

the built-in comparator detects the half wave rectify line

voltage condition, it will shut off the controller to prevent

from any damage.

Fig. 14 shows the operation.

When VHV < HVBO, the gate output will remain off even

when the VCC already reaches UVLO(ON). It therefore

forces the VCC hiccup between UVLO(ON) and

UVLO(OFF).

Unless the line voltage rises over HVBI

VAC, the gate output will not start switching even as the

next UVLO(ON) is tripped. A hysteresis is implemented

to prevent the false-triggering during turn-on and

turn-off.

VHVBI

Vcc

OUT

Switching

Non-Switching

VHV(peak)

Line Voltage

VHVBO

Non-

Switching

AC OK area

VCC-ON

VCC-OFF

Fig. 14

Current Sensing, Leading-Edge Blanking

and the Negative Spike on CS Pin

The typical current mode PWM controller feedbacks

both current signal and voltage signal to close the

control loop and achieve regulation. The LD5760

detects the primary MOSFET current across CS pin to

control in peak current mode and also limit the

pulse-by-pulse current. The maximum voltage threshold

of the current sensing pin is set at 0.7V. Thus the

MOSFET peak current can be calculated as:

)

MAX

(

PEAK



A 300nS leading-edge blanking (LEB) time is designed

in the input of CS pin to prevent false-triggering from the

current spike. In the low power applications, if the total

pulse width of the turn-on spikes is less than 150nS and

the negative spike on the CS pin does not exceed -0.3V,

the R-C filter (as shown in Fig. 15) is free to eliminate.

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