INMP421

THEORY OF OPERATION

PDM DATA FORMAT

The output from the DATA pin of the INMP421 is in PDM format. This data is the 1-bit output of a fourth-order Σ-Δ modulator. The

data is encoded so that the left channel is clocked on the falling edge of CLK and the right channel is clocked on the rising edge of

CLK.

After driving the DATA signal high or low in the appropriate half frame of the CLK signal, the DATA driver of the microphone is

tristated. In this way, two microphones—one set to the left channel and the other to the right channel—can drive a single DATA line.

Figure 1 shows a timing diagram of the PDM data format; the DATA1 and DATA2 lines shown in Figure 1 are two halves of the single

physical DATA signal. Figure 7 shows a diagram of the two stereo channels sharing a common DATA line.

Figure 7. Stereo PDM Format

If only one microphone is connected to the DATA signal, the output is clocked on a single edge only (See Figure 8.)

Figure 8. Mono PDM Format

For example, a left channel microphone is never clocked on the rising edge of CLK. In a single microphone application, each bit of the

DATA signal is typically held for the full CLK period until the next transition of the CLK signal because the leakage of the DATA line is

not sufficient to discharge the line while the driver is tristated.

The channel assignments are determined by the logic level on the L/R SELECT pin (see Table 6.)

TABLE 6. INMP421 CHANNEL SETTING

DATA2 (L)

DATA2 (L)

DATA1 (R)

DATA1 (R)

CLK

DATA

DATA1 (R)

DATA1 (R)

DATA1 (R)

CLK

DATA

L/R SELECT Pin Setting

Channel

Low (tie to GND)

Right (DATA1)

High (tie to VDD)

Left (DATA2)

Page 10 of 21

Document Number: DS-INMP421-00

Revision: 1.0.