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GPCD2TP020A Datasheet(PDF) 10 Page - Generalplus Technology Inc. |
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GPCD2TP020A Datasheet(HTML) 10 Page - Generalplus Technology Inc. |
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10 / 26 page ![]() GPCD2TP020A © Generalplus Technology Inc. Proprietary & Confidential 10 Nov. 18, 2018 Version: 1.1 Mnemonic Pin No. (LQFP48) Type Description Dedicate IO VDDIO0 27 P Power for IOA/IOD VSSIO0 28 G GND for all IOA/IOD VDDIO1 10 P Power for IOB VSSIO1 28 G GND for all IOB IOA0~IOA7 19~26 I/O IOA: bi-directional I/O ports These pins can be programmed as wakeup I/O pins. IOA1 shares with OTP_SDA; IOA2 shares with OTP_SCK IOB0~IOB7 11~18 I/O IOB: bi-directional I/O ports These pins can be programmed as wakeup I/O pins. IOD4~IOD7 33~36 I/O IOD: bi-directional I/O ports These pins can be programmed as wakeup I/O pins. Regulator - related power VDD_RGI 45 P Positive supply for regulator VSS 28 G Ground for regulator VDD 44 P Power output from regulator out Clock (Max. Freq. 16Mhz) XI 48 O Crystal input or connected to VDD through a resistor as ROSC XO 1 O Crystal output Audio AVDD 41 P Power for amplifier AVSS 37,39 G GND for amplifier AVDD_DAC 41 P Power for DAC AVSS_DAC 39 G GND for DAC AUD0 42 O Audio output AUD1 40 O Audio output ACIN 38 I Microphone input Other Signal TEST 47 I TEST Mode selection pin, NC for normal application RESETB 46 I System reset pin (active low) VPP 43 P Internal OTP programming voltage, kept floating |
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