74HC147N datasheet(2/7 Pages) PHILIPS

2 / 7 page

December 1990

Philips Semiconductors

Product speciﬁcation

10-to-4 line priority encoder

74HC/HCT147

FEATURES

• Encodes 10-line decimal to 4-line BCD

• Useful for 10-position switch encoding

• Used in code converters and generators

• Output capability: standard

• ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT147 are high-speed Si-gate CMOS devices

and are pin compatible with low power Schottky TTL

(LSTTL). They are specified in compliance with JEDEC

standard no. 7A.

The 74HC/HCT147 9-input priority encoders accept data

from nine active LOW inputs (A0 to A8) and provide a

binary representation on the four active LOW outputs

(Y0 to Y3). A priority is assigned to each input so that when

two or more inputs are simultaneously active, the input

with the highest priority is represented on the output, with

input line A8 having the highest priority.

The devices provide the 10-line to 4-line priority encoding

function by use of the implied decimal “zero”. The “zero” is

encoded when all nine data inputs are HIGH, forcing all

four outputs HIGH.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz

fo = output frequency in MHz

∑ (CL × VCC2 × fo) = sum of outputs

CL = output load capacitance in pF

VCC = supply voltage in V

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

ORDERING INFORMATION

See

“74HC/HCT/HCU/HCMOS Logic Package Information”.

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

HCT

tPHL/ tPLH

propagation delay An to Yn

CL = 15 pF; VCC = 5 V

input capacitance

3.5

CPD

power dissipation capacitance per package

notes 1 and 2

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