GD25LR128D datasheet(29/68 Pages) GIGADEVICE

29 / 68 page

1.8V Uniform Sector

Dual and Quad Serial Flash

GD25LR128D

7.12.

Set Burst with Wrap (77H)

The Set Burst with Wrap command is used in conjunction with

“Quad I/O Fast Read” command to access a fixed

length of 8/16/32/64-byte section within a 256-byte page.

The Set Burst with Wrap command sequence: CS# goes low  Send Set Burst with Wrap command  Send 24

dummy bits  Send 8 bits

“Wrap bits”  CS# goes high.

W6,W5

W4=0

W4=1 (default)

Wrap Around

Wrap Length

Wrap Around

Wrap Length

0, 0

Yes

8-byte

N/A

0, 1

Yes

16-byte

N/A

1, 0

Yes

32-byte

N/A

1, 1

Yes

64-byte

N/A

If the W6-W4 bits are set by the Set Burst with Wrap command, all the following

“Quad I/O Fast Read” command will

use the W6-W4 setting to access the 8/16/32/64-byte section within any page. To exit the

“Wrap Around” function and return

to normal read operation, another Set Burst with Wrap command should be issued to set W4=1. In QPI mode, the

“Burst

Read with Wrap (0CH)

” command should be used to perform the Read Operation with “Wrap Around” feature. The Wrap

Length set by W5-W6 in Standard SPI mode is still valid in QPI mode and can also be re-configured by

“Set Read

Parameters (C0H) command.

Figure13. Set Burst with Wrap Sequence Diagram

7.13.

Page Program (PP) (02H)

The Page Program (PP) command is for programming the memory. A Write Enable (WREN) command must

previously have been executed to set the Write Enable Latch (WEL) bit before sending the Page Program command.

The Page Program (PP) command is entered by driving CS# Low, followed by the command code, three address

bytes and at least one data byte on SI. If the 8 least significant address bits (A7-A0) are not all zero, all transmitted data

that goes beyond the end of the current page are programmed from the start address of the same page (from the address

whose 8 least significant bits (A7-A0) are all zero). CS# must be driven low for the entire duration of the sequence. The

Page Program command sequence: CS# goes low  sending Page Program command  3-byte address on SI  at least

1 byte data on SI  CS# goes high. The command sequence is shown in Figure14. If more than 256 bytes are sent to the

Command

77H

CS#

SCLK

IO0

IO1

9 10 11 12 13 14 15

W6-W4

IO2

IO3

GD25LR128D Datasheet(PDF) 29 Page - GigaDevice Semiconductor (Beijing) Inc.

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