DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151 USA • Tel: (508) 339-3000 • www.datel.com • e-mail: help@datel.com

DAC-88 Series

High-Performance, 12-Bit DACs with Input Registers

MDA_DAC-88.A01 Page 2 of 6

FUNCTIONAL SPECIFICATIONS

(Typical at +25°C and ±15V and +5V supplies unless otherwise noted.)

ABSOLUTE MAXIMUM RATINGS

PARAMETERS

LIMITS

UNITS

Positive Supply,

Pin 22

+18 Volts

Negative Supply,

Pin 14

–18 Volts

Logic Supply,

Pin 13

+5.25 Volts

Digital Input Voltage,

Pins 1–12 & 19

+5.5 Volts

Output Current,

Pin 15

±20 mA

Lead Temperature

(soldering, 10s)

300 °C

DESCRIPTION

INPUTS

Resolution

12 bits

Coding, Unipolar Output

Straight binary

Coding, Bipolar Output

Offset binary, two’s complement

➀

Input Logic Level, Bit ON ("1")

+2.0V to +5.5V

Input Logic Level, Bit OFF ("0")

0V to +0.8V

Logic Loading

1 LSTTL load

Load Input

➁

High (“1”) = hold data

Low (“0”) = transfer data

Load Input Loading

3 LSTTL loads

PERFORMANCE ➃

Nonlinearity Error, max.

±1/2LSB

Differential Nonlinearity Error, max.

±3/4LSB

Gain Error, Before Trimming

±0.1%

➂

Zero Error, Before Trimming

±0.1% of FSR

➂

Gain Tempco, max.

±20ppm/°C

Zero Tempco, Unipolar, max.

±5ppm/°C of FSR

Offset Tempco, Bipolar, max.

±10ppm/°C of FSR

Diff. Nonlinearity Tempco, max.

±2ppm/°C of FSR

Monotonicity

Guaranteed over temperature

Settling Time, 10V Change

3μs

Settling Time, 20V Change

4μs

Settling Time, 1LSB Change

800ns

Slew Rate

±20V/μs

Power Supply Rejection

±0.002%FSR/%

OUTPUTS

Output Voltage Ranges, Unipolar

➄

0 to +10V

Output Voltage Ranges, Bipolar

➄

±5V

±10V

Output Current

±5mA min.

Output Impedance

0.05Ω

POWER REQUIREMENTS

Power Supply Voltages

➅

+15V, ±0.5V at 10mA

–15V, ±0.5V at 20mA

+5V, ±0.25V at 50mA

PHYSICAL/ENVIRONMENTAL

Operating Temperature Range, Case

0°C to +70°C ( MC,MC-C)

-40°C to +100°C (ME,ME-C)

–55°C to +125°C

(MM, MM-C, 883,-C/883)

Storage Temperature Range

–65°C to +125°C

Package Type

24-pin DDIP

Weight

0.22 ounces (6.3 grams)

Footnotes:

➀ For two’s complement coding, order the "-2" model as described in

Ordering Information.

➁ Logic levels are the same as for data inputs.

➂ Initial errors are trimmable to zero. See Connection Diagram.

➃ FSR is full scale range and is 10V for 0 to +10V output range, 20V for ±10V

output range, etc.

➄ By external pin connection.

➅ For ±12V, +5V operation, contact factory.

TECHNICAL NOTES

1. It is recommended that these converters be operated with local supply

bypass capacitors of 1μF (tantalum type) at the +15V, –15V and +5V supply

pins. The capacitors should be connected as close to the pins as possible. In

high RFI noise environments, these capacitors should be shunted with 0.01μF

ceramic capacitors.

2. The analog, digital and power grounds should be separated from each other

as close as possible to pin 21 where they all must come together.

3. The “load” control pin is a level-triggered input which causes the register to

hold data with a high input and transfer data to the DAC with a low input.

4. A setup time of 40ns minimum must be allowed for the input data. The DAC

output voltage begins to change when the register output changes.

CALIBRATION PROCEDURE

Select the desired output voltage range and connect the converter as shown

in the Output Range Selection Table and the Connection Diagrams. Refer to

the Coding Tables.

Unipolar Operation

1. Offset Adjustment. Set the input digital code to 1111 1111 1111 and

adjust the Offset ADJ. potentiometer to give 0.0000V output.

2. Gain Adjustment. Set the input digital code to 0000 0000 0000 (straight

binary) and adjust the GAIN ADJ. potentiometer to give the full-scale

output voltage shown in Table 1.

Bipolar Operation

1. Offset Adjustment. Set the digital input code to 1111 1111 1111 (offset

binary) or 0111 1111 1111 (two’s complement) and adjust the OFFSET

ADJ. potentiometer to give the negative full-scale output voltage shown in

Table 2.

2. Gain Adjustment. Set the digital input code to 0000 0000 0000 (offset

binary) or 1000 0000 0000 two’s complement) and adjust the GAIN ADJ.

potentiometer to give the positive full-scale output voltage shown in Table 2.