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M3885 Datasheet(PDF) 21 Page - Renesas Technology Corp |
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M3885 Datasheet(HTML) 21 Page - Renesas Technology Corp |
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21 / 103 page ![]() 3885 Group SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS 20 INTERRUPTS Interrupts occur by 16 sources among 22 sources: thirteen exter- nal, nine internal, and one software. Interrupt Control Each interrupt is controlled by an interrupt request bit, an interrupt enable bit, and the interrupt disable flag except for the software in- terrupt caused by the BRK instruction. An interrupt occurs when both the corresponding interrupt request bit and interrupt enable bit are “1” and the interrupt disable flag is “0”. Interrupt enable bits can be set or cleared by software. Interrupt request bits can be cleared by software, but cannot be set by software. The BRK instruction interrupt cannot be disabled with any flag or bit. The I (interrupt disable) flag disables all interrupts except the BRK instruction interrupt. When several interrupts occur at the same time, the interrupts are serviced according to the priority. Interrupt Operation By acceptance of an interrupt, the following operations are auto- matically performed: 1. The contents of the program counter and the processor status register are automatically pushed onto the stack. 2. The interrupt disable flag is set and the corresponding interrupt request bit is cleared. 3. The interrupt jump destination address is read from the vector table and stored into the program counter. Interrupt Source Selection Any of the following interrupt sources can be selected by the inter- rupt source selection register (INTSEL). 1. INT0 or Input buffer full 2. INT1 or Output buffer empty 3. Serial I/O receive or LRESET 4. Serial I/O transmission or SCLSDA 5. Timer 2 or INT5 6. CNTR0 or INT0 7. CNTR1 or INT1 8. A-D conversion or Key-on wake-up External Interrupt Pin Selection The external interrupt sources of INT2, INT3, and INT4 can be se- lected from either input pin from INT20, INT30, INT40 or input pin from INT21, INT31, INT41 by the INT2, INT3, INT4 interrupt switch bit (bit 4 of PCTL2). s Notes When setting the followings, the interrupt request bit may be set to “1”. •When setting external interrupt active edge Related register: Interrupt edge selection register (address 003A16); Timer XY mode register (address 002316) •When switching interrupt sources of an interrupt vector address where two or more interrupt sources are allocated Related register: Interrupt source selection register (address 003916) •When setting input pin of external interrupts INT2, INT3 and INT4 Related register: INT2, INT3, INT4 interrupt switch bit of Port con- trol register 2 (bit 4 of address 002F16) When not requiring the interrupt occurrence synchronized with these setting, take the following sequence. ➀ Set the corresponding interrupt enable bit to “0” (disabled). ➁ Set the active edge selection bit or the interrupt source selec- tion bit to “1”. ➂ Set the corresponding interrupt request bit to “0” after 1 or more instructions have been executed. ➃ Set the corresponding interrupt enable bit to “1” (enabled). |
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