Figure 2: IBM CS24 block diagram
MPEG-2 video decoder
The integrated video decoder is
compliant with the ISO/IEC 13818-2
standards for 4:2:2 Profile at Main
Level video and MP @ ML video
decoding. In addition, the video
decoder is capable of decoding both
elementary streams and packetized
elementary streams at rates of up to
50 Mb/sec. This capability enables
high-bandwidth broadcast and
studio-quality applications.
The video decoder offers features
that provide design flexibility for
emerging, high-performance applica-
tions. Horizontal and vertical filtering,
pan and scan, on-screen display
support, 3:2 pulldown support, VBI
output support, and audio and video
synchronization are all incorporated
into these decoders. An on-chip
SDRAM memory interface, supporting
4-MB and 8-MB memory configura-
tions, helps enable more flexible,
affordable designs.
Dual audio decoders
The dual audio decoders, which can
operate simultaneously, support
robust designs like multi-language
applications requiring multiple audio
streams. The decoders can be
configured to decode MPEG-1 and
MPEG-2 Layers I & II audio in
compliance with the ISO/IEC
13818-3 standard and can also
decode Dolby Digital audio, thereby
providing the latest technology for
digital and audio systems. The entire
family of CS24 decoders offers a
built-in phase-locked loop for audio/
video synchronization and the
flexibility to support multiple audio
sampling rates and outputs.
Tools for simplified design
To assist customers in their product
development efforts, IBM offers
design tools, including an evaluation
card and card schematics.
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