BUT33

6

Motorola Bipolar Power Transistor Device Data

The Safe Operating Area figures shown in Figures 16 and 17 are

specified for the devices under the test conditiond shown.

1

Figure 16. Safe Operating Area

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

5

30

0.1

60

30

3.0

1.0

10

0.5

1000

10

100

0

Figure 17. Reverse Bias Safe Operating Area

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

0

200

400

40

20

60

600

TC = 25°C

IC/IB = 10

0.3

300

DC

1 ms

10

µs

VBE(off) = 5 V

TC = 25°C

100

µs

SAFE OPERATING AREA INFORMATION

FORWARD BIAS

There are two limitations on the power handling ability of a

transistor: average junction temperature and second break-

down. Safe operating area curves indicate IC – VCE limits of

the transistor that must be observed for reliable operation,

i.e., the transistor must not be subject to greater dissipation

than the curves indicate.

The data of Figure 16 is based on TC = 25_C; TJ(pk) is

variable depending on power level. Second breakdown pulse

limits are valid for duty cycles to 10% but must be derated

when TC y 25_C. Second breakdown limitations do not der-

ate the same as thermal limitations. Allowable current at the

voltages shown on Figure 16 may be found at any case tem-

perature by using the appropriate curve on Figure 18.

TJ(pk) may be calculated from the data in Figure 5. At high

case temperatures, thermal limitations will reduce the power

that can be handled to values less than the limitations

imposed by second breakdown.

REVERSE BIAS

For inductive loads, high voltage and high current must be

sustained simultaneously during turn–off, in most cases, with

the base to emitter junction reverse biased. Under these

conditions the collector voltage must be held to a safe level

at or below a specific value of collector current. This can be

accomplished by several means such as active clamping,

RC snubbing, load line shaping, etc. The safe level for these

devices is specified as Reverse Bias Safe Operating Area

and represents the voltage current condition allowable

during reverse biased turnoff. This rating is verified under

clamped conditions so that the device is never subjected to

an avalanche mode Figure 17 gives the RBSOA character-

istics.

0

Figure 18. Power Derating

IC, CASE TEMPERATURE (°C)

0

40

80

80

40

100

120

160

200

60

20

SECOND BREAKDOWN

DERATING

THERMAL

DERATING