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SSM3K56ACT Datasheet(PDF) 3 Page - Toshiba Semiconductor |
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SSM3K56ACT Datasheet(HTML) 3 Page - Toshiba Semiconductor |
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3 / 8 page ![]() SSM3K56ACT 3 5. 5. 5. 5. Electrical Characteristics Electrical Characteristics Electrical Characteristics Electrical Characteristics 5.1. 5.1. 5.1. 5.1. Static Characteristics (Unless otherwise specified, T Static Characteristics (Unless otherwise specified, T Static Characteristics (Unless otherwise specified, T Static Characteristics (Unless otherwise specified, Taaaa = 25 = 25 = 25 = 25 )))) Characteristics Gate leakage current Drain cut-off current Drain-source breakdown voltage Drain-source breakdown voltage Gate threshold voltage Drain-source on-resistance Forward transfer admittance (Note 1) (Note 2) (Note 3) (Note 3) Symbol IGSS IDSS V(BR)DSS V(BR)DSX Vth RDS(ON) |Yfs| Test Condition VGS = ±6 V, VDS = 0 V VDS = 10 V, VGS = 0 V ID = 1 mA, VGS = 0 V ID = 1 mA, VGS = -5 V VDS = 3 V, ID = 1 mA ID = 800 mA, VGS = 4.5 V ID = 600 mA, VGS = 2.5 V ID = 200 mA, VGS = 1.8 V ID = 50 mA, VGS = 1.5 V VDS = 3 V, ID = 200 mA Min 20 15 0.4 Typ. 186 230 290 360 1.4 Max ±1 1 1.0 235 300 480 840 Unit µA V mΩ S Note 1: If a reverse bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the drain- source breakdown voltage is lowered in this mode. Note 2: Let Vth be the voltage applied between gate and source that causes the drain current (ID) to below (1 mA for this device). Then, for normal switching operation, VGS(ON) must be higher than Vth, and VGS(OFF) must be lower than Vth. This relationship can be expressed as: VGS(OFF) < Vth < VGS(ON). Take this into consideration when using the device. Note 3: Pulse measurement. 5.2. 5.2. 5.2. 5.2. Dynamic Characteristics (Unless otherwise specified, T Dynamic Characteristics (Unless otherwise specified, T Dynamic Characteristics (Unless otherwise specified, T Dynamic Characteristics (Unless otherwise specified, Taaaa = 25 = 25 = 25 = 25 )))) Characteristics Input capacitance Reverse transfer capacitance Output capacitance Switching time (turn-on time) Switching time (turn-off time) Symbol Ciss Crss Coss ton toff Test Condition VDS = 10 V, VGS = 0 V, f = 1 MHz VDD = 10 V, ID = 200 mA VGS = 0 to 2.5 V, RG = 50 Ω, Duty ≤ 1%, Input: tr, tf < 5 ns Common source, See Chapter 5.3 Min Typ. 55 6 16 5.5 8.5 Max Unit pF ns 5.3. 5.3. 5.3. 5.3. Switching Time Test Circuit Switching Time Test Circuit Switching Time Test Circuit Switching Time Test Circuit Fig. Fig. Fig. Fig. 5.3.1 5.3.1 5.3.1 5.3.1 Test Circuit of Switching Time Test Circuit of Switching Time Test Circuit of Switching Time Test Circuit of Switching Time Fig. Fig. Fig. Fig. 5.3.2 5.3.2 5.3.2 5.3.2 Input Waveform/Output Waveform Input Waveform/Output Waveform Input Waveform/Output Waveform Input Waveform/Output Waveform 5.4. 5.4. 5.4. 5.4. Gate Charge Characteristics (Unless otherwise specified, T Gate Charge Characteristics (Unless otherwise specified, T Gate Charge Characteristics (Unless otherwise specified, T Gate Charge Characteristics (Unless otherwise specified, Taaaa = 25 = 25 = 25 = 25 )))) Characteristics Total gate charge (gate-source plus gate-drain) Gate-source charge 1 Gate-drain charge Symbol Qg Qgs1 Qgd Test Condition VDD = 10 V, VGS = 4.5 V, ID = 800 mA Min Typ. 1.0 0.12 0.4 Max Unit nC 2015-11-16 Rev.1.0 ©2015 Toshiba Corporation |
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