A29L320 Series

PRELIMINARY

(September, 2005, Version 0.0)

20

AMIC Technology, Corp.

Table 9. A29L320 Command Definitions

Bus Cycles (Notes 2 - 5)

First

Second

Third

Fourth

Fifth

Sixth

Command

Sequence

(Note 1)

Addr Data

Addr Data

Addr Data Addr

Data

Addr Data

Addr

Data

Read (Note 6)

1

RA

RD

Reset (Note 7)

1

XXX

F0

Word

555

2AA

555

Manufacturer ID

Byte

4

AAA

AA

555

55

AAA

90

X00

37

Word

555

2AA

555

X01

22F4

Device ID,

Top Boot Block

Byte

4

AAA

AA

555

55

AAA

90

X02

F4

Word

555

2AA

555

X01 22F9

Device ID,

Bottom Boot Block

Byte

4

AAA

AA

555

55

AAA

90

X02

F9

Word

555

2AA

555

X03

Continuation ID

Byte

4

AAA

AA

555

55

AAA

90

X06

7F

XX00

Word

555

2AA

555

(SA)

X02

XX01

00

Sector Protect Verify

(Note 9)

Byte

4

AAA

AA

555

55

AAA

90

(SA)

X04

01

Word

55

CFI Query (Note 10)

Byte

1

AA

98

Byte

555

2AA

555

Program

Byte

4

AAA

AA

555

55

AAA

A0

PA

PD

Word

555

2AA

555

Unlock Bypass

Byte

3

AAA

AA

555

55

AAA

20

Unlock Bypass Program (Note

11)

2

XXX

A0

PA

PD

Unlock Bypass Reset (Note 12)

2

XXX

90

XXX

00

Word

555

2AA

555

555

2AA

555

Chip Erase

Byte

6

AAA

AA

555

55

AAA

80

AAA

AA

555

55

AAA

10

Word

555

2AA

555

555

2AA

Sector Erase

Byte

6

AAA

AA

555

55

AAA

80

AAA

AA

555

55

SA

30

Erase Suspend (Note 13)

1

XXX

B0

Erase Resume (Note 14)

1

XXX

30

Legend:

X = Don't care

RA = Address of the memory location to be read.

RD = Data read from location RA during read operation.

PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the

whichever happens later.

PD = Data to be programmed at location PA. Data latches on the rising edge of

SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A20- A12 select a unique sector.

Note:

1.

See Table 1 for description of bus operations.

2.

All values are in hexadecimal.

3.

Except when reading array or autoselect data, all bus cycles are write operation.

4.

Address bits A20 - A11 are don't cares for unlock and command cycles, unless SA or PA required.

5.

No unlock or command cycles required when reading array data.

6.

(while the device is providing status data).

7.

The fourth cycle of the autoselect command sequence is a read cycle.

8.

The data is 00h for an unprotected sector and 01h for a protected sector. See "Autoselect Command Sequence" for more

information.

9.

The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more

information.

10. Command is valid when device is ready to read array data or when device is in autoselect mode.

11. The Unlock Bypass command is required prior to the Unlock Bypass Program command.

12. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass

mode.

13. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.

14. The Erase Resume command is valid only during the Erase Suspend mode.