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LPC47M14X Datasheet(PDF) 187 Page - SMSC Corporation |
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LPC47M14X Datasheet(HTML) 187 Page - SMSC Corporation |
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187 / 205 page  SMSC DS – LPC47M14X Page 187 Rev. 03/19/2001 t9 t8 t7 t6 t4 t5 t3 t2 t1 nWRITE PD<7:0> nDATASTB nADDRSTB nWAIT FIGURE 28 – EPP 1.9 DATA OR ADDRESS WRITE CYCLE NAME DESCRIPTION MIN TYP MAX UNITS t1 nWAIT Asserted to nWRITE Asserted (Note 1) 60 185 ns t2 nWAIT Asserted to nWRITE Change (Note 1) 60 185 ns t3 nWAIT Asserted to PDATA Invalid (Note 1) 0 ns t4 PDATA Valid to Command Asserted 10 ns t5 nWRITE to Command Asserted 5 35 ns t6 nWAIT Asserted to Command Asserted (Note 1) 60 210 ns t7 nWAIT Deasserted to Command Deasserted (Note 1) 60 190 ns t8 Command Asserted to nWAIT Deasserted 0 10 s t9 Command Deasserted to nWAIT Asserted 0 ns Note 1: nWAIT must be filtered to compensate for ringing on the parallel bus cable. nWAIT is considered to have settled after it does not transition for a minimum of 50 nsec. |
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