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LPC47M14X Datasheet(PDF) 188 Page - SMSC Corporation |
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LPC47M14X Datasheet(HTML) 188 Page - SMSC Corporation |
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188 / 205 page  SMSC DS – LPC47M14X Page 188 Rev. 03/19/2001 t12 t11 t10 t9 t7 t8 t6 t5 t4 t3 t2 t1 nWRITE PD<7:0> DATASTB ADDRSTB nWAIT FIGURE 29 – EPP 1.9 DATA OR ADDRESS READ CYCLE NAME DESCRIPTION MIN TYP MAX UNITS t1 nWAIT Asserted to nWRITE Deasserted 0 185 ns t2 nWAIT Asserted to nWRITE Modified (Notes 1,2) 60 190 ns t3 nWAIT Asserted to PDATA Hi-Z (Note 1) 60 180 ns t4 Command Asserted to PDATA Valid 0 ns t5 Command Deasserted to PDATA Hi-Z 0 ns t6 nWAIT Asserted to PDATA Driven (Note 1) 60 190 ns t7 PDATA Hi-Z to Command Asserted 0 30 ns t8 nWRITE Deasserted to Command 1 ns t9 nWAIT Asserted to Command Asserted 0 195 ns t10 nWAIT Deasserted to Command Deasserted (Note 1) 60 180 ns t11 PDATA Valid to nWAIT Deasserted 0 ns t12 PDATA Hi-Z to nWAIT Asserted 0 µs Note 1: nWAIT is considered to have settled after it does not transition for a minimum of 50 ns. Note 2: When not executing a write cycle, EPP nWRITE is inactive high. |
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