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74LVC2T45GS-Q100 Datasheet(PDF) 2 Page - Nexperia B.V. All rights reserved |
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74LVC2T45GS-Q100 Datasheet(HTML) 2 Page - Nexperia B.V. All rights reserved |
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2 / 30 page ![]() Nexperia 74LVC2T45-Q100; 74LVCH2T45-Q100 Dual supply translating transceiver; 3-state • IOFF circuitry provides partial Power-down mode operation 3. Ordering information Table 1. Ordering information Package Type number Temperature range Name Description Version 74LVC2T45DC-Q100 74LVCH2T45DC-Q100 -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74LVC2T45GT-Q100 -40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 × 1.95 × 0.5 mm SOT833-1 74LVC2T45GS-Q100 -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1.0 × 0.35 mm SOT1203 4. Marking Table 2. Marking Type number Marking code [1] 74LVC2T45DC-Q100 V45 74LVCH2T45DC-Q100 X45 74LVC2T45GT-Q100 V45 74LVC2T45GS-Q100 V5 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 001aag577 DIR 1B 2B 7 6 1A 2A 5 2 3 VCC(A) VCC(B) Fig. 1. Logic symbol 001aag578 DIR 1B 2B 1A 2A VCC(A) VCC(B) Fig. 2. Logic diagram 74LVC_LVCH2T45_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 3 — 28 January 2019 2 / 30 |
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