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74LVC1G98GF Datasheet(PDF) 4 Page - Nexperia B.V. All rights reserved |
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74LVC1G98GF Datasheet(HTML) 4 Page - Nexperia B.V. All rights reserved |
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4 / 20 page ![]() © Nexperia B.V. 2017. All rights reserved 74LVC1G98 All information provided in this document is subject to legal disclaimers. Product data sheet Rev. 4 — 19 December 2016 4 of 20 Nexperia 74LVC1G98 Low-power configurable multiple function gate 7.1 Logic configurations Table 5. Function selection table Logic function Figure 2-input MUX with inverted output see Figure 5 2-input NAND see Figure 6 2-input NOR with one input inverted see Figure 7 2-input AND with one input inverted see Figure 7 2-input NAND with one input inverted see Figure 8 2-input OR with one input inverted see Figure 8 2-input NOR see Figure 9 Buffer see Figure 10 Inverter see Figure 11 Fig 5. 2-input MUX with inverted output Fig 6. 2-input NAND gate Fig 7. 2-input AND gate with input A inverted or 2-input NOR gate with inverted C input Fig 8. 2-input OR gate with input B inverted or 2-input NAND gate with input C inverted Fig 9. 2-input NOR gate Fig 10. Buffer |
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