Nexperia

74LVC1G97

Low-power configurable multiple function gate

6. Pinning information

6.1. Pinning

74LVC1G97

B

C

GND

A

Y

001aan190

1

2

3

6

5

4

Fig. 2. Pin configuration SOT363 (SC-88)

and SOT457 (SC-74)

74LVC1G97

GND

001aan191

B

A

C

Y

Transparent top view

2

3

1

5

4

6

Fig. 3. Pin configuration SOT886 (XSON6)

74LVC1G97

GND

001aan192

B

A

C

Y

Transparent top view

2

3

1

5

4

6

Fig. 4. Pin configuration SOT891, SOT1115,

and SOT1202 (XSON6)

aaa-025870

Transparent top view

5

2

GND

74LVC1G97

6

1

4

3

Y

A

C

B

Fig. 5. Pin configuration SOT1255 (X2SON6)

6.2. Pin description

Table 3. Pin description

Symbol

Pin

Description

B

1

data input

GND

2

ground (0 V)

A

3

data input

Y

4

data output

5

supply voltage

C

6

data input

74LVC1G97

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 8 August 2018

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