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CS44L11 Datasheet(PDF) 21 Page - Cirrus Logic

Part # CS44L11
Description  Low Voltage Class-D PWM Headphone Amplifier
PDF  34 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS44L11 Datasheet(HTML) 21 Page - Cirrus Logic

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21
CS44L11
4.9.3
Double-Speed Mode (DBS)
Default = 0
0 - Single-Speed
1 - Double-Speed (DBS)
Function:
Single-Speed supports 8 kHz to 50 kHz sample rates and Double-Speed supports 50 kHz to 96 kHz sam-
ple rates. MCLKDIV, DBS, CLKDIV and FRQSFT are set per the user’s MCLK and LRCK requirements.
Refer to Tables 11, 12, 13, and Section 6.2.
Note:
De-emphasis, ramp control, and treble control are not available in Double-Speed Mode.
4.9.4
Frequency Shift (FRQSFT)
Default = 00
Function:
MCLKDIV, DBS, CLKDIV and FRQSFT are set per the user’s MCLK and LRCK requirements. Refer to
Tables 11, 12, 13, and Section 6.2.
DBS = 0
MCLKDIV = 0
DBS = 0
MCLKDIV = 1
LRCK
(kHz)
MCLK/
LRCK
MCLK
(MHz)
MCLK/
LRCK
MCLK
(MHz)
FRQSFT1 FRQSFT0 CLKDIV1 CLKDIV0
PWM
Switching
Freq.
(kHz)
48
256
12.288
512
24.576
0
0
0
0
384
48
512
24.576
1024
49.152
0
0
1
0
44.1
256
11.2896
512
22.5792
0
0
0
0
352.8
44.1
512
22.5792
1024
45.1584
0
0
1
0
32
512
16.384
1024
32.768
0
1
0
0
512
32
1024
32.768
2048
65.536
0
1
1
0
24
512
12.288
1024
24.576
0
1
0
0
384
24
1024
24.576
2048
49.152
0
1
1
0
12
1024
12.288
2048
24.576
1
0
0
0
384
12
2048
24.576
4096
49.152
1
0
1
0
Table 11. Single-Speed Clock Modes - Control Port Mode
LRCK
(kHz)
MCLK/
LRCK
MCLK
(MHz)
PWM
Switching
Freq. (kHz)
48
256
12.288
384
48
512
24.576
44.1
256
11.2896
352.8
44.1
512
22.5792
32
1024
32.768
512
24
1024
24.576
384
12
2048
24.576
Table 12. Single-Speed Clock Modes - Stand-Alone Mode



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