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CS8920A Datasheet(PDF) 79 Page - Cirrus Logic |
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CS8920A Datasheet(HTML) 79 Page - Cirrus Logic |
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79 / 144 page  DMA Channel Number (Read/Write) Address: PacketPage base + 0374h Address 0374h DMA channel assignment: 05 = pins DRQ5 and DACK5 06 = pins DRQ6 and DACK6 07 = pins DRQ7 and DACK7 08 = All DRQ pins high-impedance The DMA Channel register defines the DMA pins selected by the CS8920A. In the typical application, the follow- ing bus signals are tied to the following pins: Bus signal Typical pin connection DRQ5 DACK5 DRQ5 DACK5 DRQ6 DACK6 DRQ6 DACK6 DRQ7 DACK7 DRQ7 DACK7 After reset, if no EEPROM is found by the CS8920A, the register has 0000 effectively disabling DMA interface. If an EEPROM is found, the register’s initial value may be set by the EEPROM. XXXX XXXX XXXX 0000 CS8920A DS238PP2 79 |
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