STM32L4P5CE datasheet(149/310 Pages) STMICROELECTRONICS

149 / 310 page

Table 29. Current consumption in Run and Low-power run modes,

code with data processing running from Flash in single bank, ART disable

Symbol

Parameter

Conditions

fHCLK

TYP

MAX(1)

Unit

Voltage

scaling

25°C

55°C

85°C

105°C 125°C

25°C

55°C

85°C

105°C 125°C

IDD(Run)

Supply

current in

Run mode

fHCLK = fHSE

up to 48MHz

included,

bypass mode

PLL ON above

48 MHz all

peripherals

disable

Range 2

26 MHz

3.60

3.95

4.95

6.40

9.00

TBD

16 MHz

2.40

2.75

3.75

5.15

7.70

TBD

8 MHz

1.35

1.70

2.70

4.10

6.60

TBD

4 MHz

0.79

1.10

2.10

3.50

6.05

TBD

2 MHz

0.51

0.84

1.80

3.20

5.75

TBD

1 MHz

0.38

0.70

1.65

3.05

5.70

TBD

100 KHz

0.25

0.58

1.55

2.95

5.50

TBD

Range 1

Boost Mode

120 MHz 17.50

18.00

19.50

21.50

25.00

TBD

Range 1

Normal

Mode

80 MHz

12.50

13.00

14.00

16.00

19.00

TBD

72 MHz

11.00

11.50

13.00

15.00

18.00

TBD

64 MHz

10.00

10.50

12.00

13.50

17.00

TBD

48 MHz

7.90

8.40

9.70

11.50

14.50

TBD

32 MHz

5.60

6.10

7.35

9.10

12.00

TBD

24 MHz

4.25

4.75

5.10

7.75

11.00

TBD

16 MHz

3.00

3.45

4.70

6.45

9.50

TBD

IDD

(LPRun)

Supply

current in

Low-power

run mode

fHCLK = fMSI

all peripherals disable

2 MHz

495

890

2000

3550

6300

TBD

µA

1 MHz

315

720

1800

3400

6150

TBD

400 KHz

235

615

1700

3250

6050

TBD

100 KHz

175

575

1700

3200

6000

TBD

1. Guaranteed by characterization results, unless otherwise specified.

STM32L4P5CE Datasheet(PDF) 149 Page - STMicroelectronics

STM32L4P5CE Datasheet(HTML) 149 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL