TC9324F datasheet(21/101 Pages) TOSHIBA

21 / 101 page

TC9324F

2002-02-08

I/O Map

All the ports in the device are accessed by six I/O instructions (OUT1 to 3 and IN1 to 3) and 4-bit code

number matrices.

The following pages show the port allocations as an I/O map. On the I/O map, the ports used by I/O

instructions are in horizontal positions and the port code numbers are in vertical positions. The G-register,

data register, DAL address register, and DAL bit are treated as ports.

The OUT1 to 3 instructions specify output ports. The IN1 to 3 instructions specify input ports.

Note: The diagonal lines on the I/O map indicate ports that do not exist in the device. Executing an output

instruction to output data to a non-existent output port has no effect on other ports or on data memory

contents.

When a non-existent input port is specified by an input instruction, all the content read to the data memory

is undefined.

Note: Output ports indicated by an asterisk (*) on the I/O map are unused ports. Any data output to these ports

are “don’t care”.

Note: The contents of the ports are represented by four bits where Y1 corresponds to the lowest bit of the data

in data memory, and Y8 to the highest bit.

The ports specified by the six input/output instructions and by code No. C are represented in this

document by the following notation.

Example: The G-register is set by the OUT1 instruction with codes C and D. Therefore, the notation is

φL1C and φL1D.

φ [K/L] m n (o) (Pp)

Contents of selected port (indirectly specified data, 0 to F (HEX))

I/O instruction operand CN (0 to F (HEX))

The six I/O instructions (IN1 to IN3, OUT1 to OUT3)

I/O instruction

OUT1

OUT2

OUT3

IN1

IN2

IN3

Indicates input/output ports.

K: Input port (instructions IN1 to 3)

L: Output port (instructions OUT1 to 3)

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