FPD1050

Phone: +1 408 850-5790

http:// www.filcs.com

Revised: 8/05/04

Fax: +1 408 850-5766

Email: sales@filcsi.com

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FEATURES

♦ 28.5 dBm Linear Output Power at 12 GHz

♦ 11 dB Power Gain at 12 GHz

♦ 14 dB Maximum Stable Gain at 12 GHz

♦ 41 dBm Output IP3

♦ 45% Power-Added Efficiency

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DESCRIPTION AND APPLICATIONS

The FPD1050 is an AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT),

featuring a 0.25

µm by 1050 µm Schottky barrier gate, defined by high-resolution stepper-based

photolithography. The recessed and offset Gate structure minimizes parasitics to optimize

performance. The epitaxial structure and processing have been optimized for reliable high-power

SOT89 plastic package.

Typical applications include commercial and other narrowband and broadband high-performance

amplifiers, including SATCOM uplink transmitters, PCS/Cellular low-voltage high-efficiency output

amplifiers, and medium-haul digital radio transmitters.

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ELECTRICAL SPECIFICATIONS AT 22°C

Parameter

Symbol

Test Conditions

Min

Typ

Max

Units

RF SPECIFICATIONS MEASURED AT f = 12 GHz USING CW SIGNAL

Power at 1dB Gain Compression

27.5

28.5

dBm

MSG

14.0

dB

10.0

11.0

dB

Power-Added Efficiency

PAE

45

%

Output Third-Order Intercept Point

IP3

Matched for optimal power

Tuned for best IP3

39

41

dBm

Saturated Drain-Source Current

250

315

375

mA

Maximum Drain-Source Current

520

mA

Transconductance

280

mS

Gate-Source Leakage Current

15

µA

Pinch-Off Voltage

1.0

V

Gate-Source Breakdown Voltage

16

18

V

Gate-Drain Breakdown Voltage

16

18

V

Thermal Resistivity (see Notes)

45

°C/W

DRAIN

BOND

PAD (2X)

SOURCE

BOND

PAD (2x)

GATE

BOND

PAD (1X)

DIE SIZE: 470 x 440

µm

DIE THICKNESS: 100

µm

BONDING PADS: >85 x 60

µm