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KSZ8873MML Datasheet(PDF) 78 Page - Microchip Technology |
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KSZ8873MML Datasheet(HTML) 78 Page - Microchip Technology |
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78 / 91 page  KSZ8873MML DS00002776A-page 78 2018 Microchip Technology Inc. 7.5 SPI Timing FIGURE 7-11: SPI INPUT TIMING FIGURE 7-12: SPI OUTPUT TIMING TABLE 7-5: SPI TIMING PARAMETERS Parameter Description Min. Typ. Max. Units fSCLK SPI_SCLK Clock Frequency — — 25 MHz t1 SPI_CSN active setup time 16 — — ns t2 SDA (SPID) data input setup time 5 — — ns t3 SDA (SPID) data input hold time 6 — — ns t4 SPI_CSN active hold time 16 — — ns t5 SPI_CSN disable high time 16 — — ns t6 SPI_SCLK falling edge to SPIQ (SDO) data output valid 4 — 15 ns t7 SPI_CSN inactive to SPIQ (SDO) data output invalid 2 — — ns SPI_SCLK SPIQ (SDO) SDA (SPID) SPI_CSN MSB BIT LSB BIT t2 t5 t3 1/fSCLK t4 t1 HIGH IMPEDANCE SPI_SCLK SPIQ (SDO) SDA (SPID) SPI_CSN LSB IN DON’T CARE MSB BIT LSB BIT t6 t7 1/fSCLK t5 |
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