Product Specification

LP173WF4

Liquid Crystal Display

Ver. 0.0

Oct. 15, 2013

10 / 31

3-4. Signal Timing Specifications

Table 5. TIMING TABLE

This is the signal timing required at the input of the User connector. All of the interface signal timing should be

satisfied with the following specifications and specifications of eDP Tx/Rx for its proper operation.

3-5. Signal Timing Waveforms

Condition : VCC =3.3V

Low: 0.3VCC

High: 0.7VCC

Data Enable, Hsync, Vsync

Hsync

Data Enable

Vsync

Data Enable

t

WH

t

HP

t

HFP

t

HBP

t

VP

t

WV

t

VBP

t

VFP

0.5 Vcc

DCLK

ITEM

Symbol

Min

Typ

Max

Unit

Note

DCLK

Frequency

-

138.7

-

MHz

Hsync

Period

Thp

-

2080

-

tCLK

Width

-

32

-

Width-Active

-

1920

-

Vsync

Period

-

1111

-

tHP

Width

-

5

-

Width-Active

-

1080

-

Data

Enable

Horizontal back porch

-

80

-

tCLK

Horizontal front porch

-

48

-

Vertical back porch

-

23

-

tHP

Vertical front porch

-

3

-

Notice. all reliabilities are specified for timing specification based on refresh rate of 60Hz. However,

LP173WF4 has a good actual performance even at lower refresh rate (e.g. 40Hz or 50Hz) for power saving

Mode, whereas LP173WF4 is secured only for function under lower refresh rate. 60Hz at Normal mode, 50Hz,

40Hz at Power save mode. Don’t care Flicker level (power save mode).