MXT1664T3-ABESQTP datasheet(23/98 Pages) MICROCHIP

23 / 98 page

MXT1664T3 2.0

 2018 Microchip Technology Inc.

DS40002054A-page 23

2.5.5

VDDCORE

VddCore is internally generated from the Vdd power supply. To guarantee stability of the internal voltage regulator, one

or more external decoupling capacitors are required.

2.5.6

XTAL_XOUT AND XTAL_XIN

In USB mode, the XTAL_XOUT and XTAL_XIN pins are connected to the crystal oscillator. In I2C mode, the

XTAL_XOUT and XTAL_XIN pins are used by the SPI Debug Interface and should be brought out to test points.

2.5.7

MULTIPLE FUNCTION PINS

Some pins may have multiple functions. In this case, only one function can be chosen and the circuit should be designed

accordingly.

2.5.8

GPIO PINS

The mXT1664T3 has 6 GPIO pins. The pins can be set to be either an input or an output, as required, using the GPIO

Configuration T19 object.

If a GPIO pin is unused, it can be left unconnected externally as long as it is given a defined state by the GPIO

Configuration T19 object. By default the GPIO pins are set to be inputs so if a pin is not used, and is left configured as

an input, it should be connected to GND through a resistor. Alternatively, it can be set as an output low using the GPIO

Configuration T19 object and left open. This second option avoids any problems should the pin accidentally be

configured as output high at a later date.

If the GPIO Configuration T19 object is not enabled for use, the GPIO pins cannot be used.

2.5.9

SPI DEBUG INTERFACE

In I2C mode, the DBG_CLK, DBG_DATA and DBG_SS lines form the SPI Debug Interface. These pins should be routed

to test points on all designs, such that they can be connected to external hardware during system development and for

debug purposes. See also Section 13.1 “SPI Debug Interface”.

The DBG_CLK, DBG_DATA and DBG_SS lines should not be connected to power or GND.

MXT1664T3-ABESQTP Datasheet(PDF) 23 Page - Microchip Technology