IS25LP032D-RGLA3 datasheet(56/118 Pages) ISSI

Part #	IS25LP032D-RGLA3

Description	SERIAL FLASH MEMORY WITH 133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE

PDF	118 Pages

Scroll/Zoom	100%

Manufacturer	ISSI [Integrated Silicon Solution, Inc]

Direct Link	http://www.issi.com

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56 / 118 page

IS25LP032D

IS25WP032D

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A12

08/04/2020

8.14 WRITE ENABLE OPERATION (WREN, 06h)

The Write Enable (WREN) instruction is used to set the Write Enable Latch (WEL) bit. The WEL bit is reset to the

write-protected state after power-up. The WEL bit must be write enabled before any write operation, including

Sector Erase, Block Erase, Chip Erase, Page Program, Program Information Row, Write Status Register, Write

Function Register, Set non-volatile Read Register, Set non-volatile Extended Read Register, and Write Autoboot

will be reset to the write-protected state automatically upon completion of a write operation. The WREN instruction

is required before any above operation is executed.

Figure 8.22 Write Enable Sequence In SPI Mode

Instruction = 06h

CE#

SCK

Mode 3

Mode 0

High Impedance

Figure 8.23 Write Enable Sequence In QPI Mode

06h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

IS25LP032D-RGLA3 Datasheet(PDF) 56 Page - Integrated Silicon Solution, Inc