CYUSB3KIT-003 datasheet(21/54 Pages) CYPRESS

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CYUSB3KIT-003 SuperSpeed Explorer Kit User Guide, Doc. # 001-93186 Rev. *A

Kit Operation

Use this port to test FX3 applications that communicate with a host PC at SuperSpeed or High-

Speed rates.

The USB 2.0 Micro-B receptacle connects to an onboard Cypress CY7C65215 USB-Serial Dual

Channel (UART/I2C/SPI) Bridge (www.cypress.com/go/CY7C65215), which is configured as an

integrated debugger operating at the USB Full-Speed rate. This chip provides a bridge between the

FX3 debug interface and a PC's USB port, enabling two debug methods: serial terminal messages

and JTAG debug. These debug methods are explained in Section 3.7 on page 33.

3.2

Jumpers

The SuperSpeed Explorer Kit development board contains four jumpers, labeled J2–J5. The jumper

settings are as follows.

Jumper J2: This jumper sets the voltage levels of the FX3 power domains VIO1, VIO2, and VIO3.

Inserting the jumper selects 3.3 V while removing the jumper selects 1.8 V. These domains set the

operating voltage of the FX3 interface pins. The default is to have the J2 jumper in place, selecting

the 3.3-V interface. This makes the interface compatible with the 3.3-V SRAM connected to the

GPIF II interface.

Jumper J3: This jumper is connected in series with the VBUS signal of the USB 3.0 connector. This

jumper must be inserted to power the development board. The J3 jumper is provided to measure the

development board's power consumption by removing the J3 jumper and connecting an ammeter

between the J3 pin headers.

Jumper J4: This jumper selects the FX3 boot method. Similar to all Cypress EZ-USB parts, the code

is loaded ("booted") into high-speed internal RAM for execution. The SuperSpeed Explorer Kit

supports USB boot and I2C boot. FX3 contains an internal ROM, where the boot code resides, and

an internal RAM, where application firmware and data are stored. At power-on, depending on this

jumper setting, FX3 boots from the internal ROM and then does one of the following:

■

If J4 is removed, then FX3 copies the application firmware from the onboard 2-Mbit I2C EEPROM

to FX3's internal RAM and then enumerates with the functionality defined in the application firm-

ware. If there is no valid firmware in EEPROM or if the EEPROM is disabled or not present, then

FX3 enumerates as a bootloader device and enables firmware download to internal RAM through

USB. This method of booting is referred to as I2C boot, with fallback to USB. The USBBulk-

SourceSinkLED firmware is stored in the onboard EEPROM when the SuperSpeed Explorer Kit

development board leaves the Cypress factory. The steps to store new firmware in EEPROM and

then boot from it are explained in Section 3.5.3 on page 28.

■

If J4 is inserted, then FX3 enumerates as a bootloader device and allows the application firmware

to be loaded to internal RAM through USB. This boot method is referred to as USB boot. In this

boot method, you can download the application firmware to FX3's RAM using a host application.

The steps to load firmware to FX3's RAM using this boot method are explained in a later section.

The J4 jumper is labeled "PMODE" to correspond to the FX3 PMODE0 pin.

Jumper J5: This jumper is connected in series with the CTL0 pin of the FX3. The CTL0 pin is used

as a chip select signal for the onboard SRAM external to FX3. J5 must be inserted for applications

that use the SRAM. It is recommended that you deselect the SRAM by removing J5 when the SRAM

is not used. Note that the SRAM operates at 3.3 V and does not support 1.8-V signaling. Therefore,

the SRAM must be deselected if the 1.8-V interface is selected (if J2 is removed, then J5 should also

be removed). Table 3-1 summarizes the default jumper settings.

Table 3-1. Default Jumper Settings

Jumper

Jumper State

Function

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