AS7C34096A datasheet(4/9 Pages) ALSC

4 / 9 page

AS7C34096A

8/17/04, v. 2.1

Alliance Semiconductor

P. 4 of 9

Key to switching waveforms

Read waveform 1 (address controlled)3,6,7,9

Read waveform 2 (CE, OE controlled)3,6,8,9

Read cycle (over the operating range)3,9

Parameter

Symbol

–10

–12

–15

–20

Unit Notes

Min

Max

Min

Max

Min

Max

Min

Max

Read cycle time

tRC

–12–

–20

–

Address access time

tAA

–10

–

12–

–20

Chip enable (CE) access time

tACE

–10

–

12–

–20

Output enable (OE) access time

tOE

–4–5–

6–7

Output hold from address change

tOH

3–3–3

–3–

CE Low to output in low Z

tCLZ

3–3–3

–3–

4, 5

CE High to output in high Z

tCHZ

–5–6–

7–9

4, 5

OE Low to output in low Z

tOLZ

0–0–0

–0–

4, 5

OE High to output in high Z

tOHZ

–5–6–

7–9

4, 5

Power up time

tPU

0–0–0

–0–

4, 5

Power down time

tPD

–10

–

12–

–20

4, 5

Undefined/don’t care

Falling input

Rising input

Address

DOUT

Data valid

tOH

tAA

tRC

current

Supply

DOUT

tOE

tOLZ

tACE

tCHZ

tCLZ

tPU

tPD

ICC

ISB

50%

tOHZ

Data valid

tRC1

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