PIC16F15213 datasheet(8/420 Pages) MICROCHIP

8 / 420 page

14.3. WDT Time-out Period...............................................................................................................104

14.4. Clearing the WDT.....................................................................................................................104

14.5. WDT Operation During Sleep...................................................................................................104

14.6. Register Definitions: WDT Control........................................................................................... 104

14.7. Register Summary - WDT Control............................................................................................106

15. NVM - Nonvolatile Memory Control ....................................................................................................107

15.1. Program Flash Memory............................................................................................................107

15.2. FSR and INDF Access............................................................................................................. 108

15.3. NVMREG Access..................................................................................................................... 108

15.4. Register Definitions: Nonvolatile Memory Control....................................................................121

15.5. Register Summary: NVM Control............................................................................................. 127

16. I/O Ports.............................................................................................................................................. 128

16.1. Overview.................................................................................................................................. 128

16.2. PORTx - Data Register............................................................................................................ 128

16.3. LATx - Output Latch................................................................................................................. 129

16.4. TRISx - Direction Control......................................................................................................... 130

16.5. ANSELx - Analog Control.........................................................................................................130

16.6. WPUx - Weak Pull-Up Control................................................................................................. 130

16.7. INLVLx - Input Threshold Control............................................................................................. 130

16.8. SLRCONx - Slew Rate Control................................................................................................ 130

16.9. ODCONx - Open-Drain Control................................................................................................131

16.10. Edge Selectable Interrupt-on-Change......................................................................................131

16.11. I2C Pad Control........................................................................................................................ 131

16.12. I/O Priorities............................................................................................................................. 131

16.13. MCLR/VPP/RA3 Pin..................................................................................................................132

16.14. Register Definitions: Port Control.............................................................................................132

16.15. Register Summary - IO Ports...................................................................................................142

17. IOC - Interrupt-on-Change.................................................................................................................. 143

17.1. Overview.................................................................................................................................. 143

17.2. Enabling the Module.................................................................................................................143

17.3. Individual Pin Configuration......................................................................................................144

17.4. Interrupt Flags.......................................................................................................................... 144

17.5. Clearing Interrupt Flags............................................................................................................144

17.6. Operation in Sleep....................................................................................................................144

17.7. Register Definitions: Interrupt-on-Change Control................................................................... 144

17.8. Register Summary: Interrupt-on-Change................................................................................. 148

18. PPS - Peripheral Pin Select Module................................................................................................... 149

18.1. Overview.................................................................................................................................. 149

18.2. PPS Inputs............................................................................................................................... 149

18.3. PPS Outputs.............................................................................................................................150

18.4. Bidirectional Pins......................................................................................................................151

18.5. PPS Lock..................................................................................................................................151

18.6. Operation During Sleep............................................................................................................152

18.7. Effects of a Reset..................................................................................................................... 152

18.8. Register Definitions: Peripheral Pin Select (PPS).................................................................... 152

PIC16F15213/14/23/24/43/44

Preliminary Datasheet

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