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PIC16F15213 Datasheet(PDF) 104 Page - Microchip Technology |
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PIC16F15213 Datasheet(HTML) 104 Page - Microchip Technology |
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104 / 420 page ![]() ...........continued WDTE[1:0] SEN Device Mode WDT Mode 10 x Awake Active Sleep Disabled 01 1 X Active 0 X Disabled 00 x X Disabled 14.2.1 WDT is Always On When the WDTE bits are set to ‘11’, the WDT is always on. WDT protection is active during Sleep mode. 14.2.2 WDT is Off During Sleep When the WDTE bits are set to ‘10’, the WDT is on except during Sleep mode. During Sleep mode, WDT protection is disabled. 14.2.3 WDT Controlled By Software When the WDTE bits are set to ‘01’, the WDT is controlled by the Software Watchdog Timer Enable (SEN) bit. When SEN is set (SEN = 1), WDT protection is active. When SEN is clear (SEN = 0), WDT protection is disabled. 14.2.4 WDT is Off When the WDTE bits are set to ‘00’, the WDT is disabled. In this mode, the SEN bit is ignored. 14.3 WDT Time-out Period The Watchdog Timer Prescale Select (PS) bits set the time-out period from 1 ms to 256 seconds (nominal). After a Reset, the default time-out period is two seconds. 14.4 Clearing the WDT The WDT is cleared when any of the following conditions occur: • Any Reset • Valid CLRWDT instruction is executed • Device enters Sleep • Devices wakes up from Sleep • Any write to the WDTCON register 14.5 WDT Operation During Sleep When the WDT enters Sleep, the WDT is cleared. If the WDT is enabled during Sleep, the WDT resumes counting. When the WDT exits Sleep, the WDT is cleared again. When a WDT time-out occurs while the device is in Sleep, no Reset is generated. Instead, the device wakes up and resumes operation. The Time-out (TO) and Power-down (PD) bits are cleared to indicate the event. Additionally, the Watchdog Timer Reset Flag (RWDT) bit is cleared, indicating a WDT Reset event occurred. 14.6 Register Definitions: WDT Control PIC16F15213/14/23/24/43/44 WDT - Watchdog Timer © 2020 Microchip Technology Inc. Preliminary Datasheet DS40002195A-page 104 |
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