The recommendation is to choose a ferrite bead with an impedance of 8 Ω to 20 Ω at 100 MHz. Refer to Table

8-6 for possible ferrite beads.

Table 8-6. Recommended Ferrite Beads

PART NUMBER

MANUFACTURER

SIZE

IMPEDANCE AT

100 MHZ

INDUCTANCE AT

100 MHz

(CALCULATED)

DC RESISTANCE CURRENT

RATING

BLE18PS080SN1

MuRata

0603

8.5 Ω

13.5 nH

4 mΩ

5 A

74279221100

Wurth Elektronik

1206

10 Ω

15.9 nH

3 mΩ

10.5 A

7427922808

Wurth Electronik

0603

8 Ω

12.7 nH

5 mΩ

9.5 A

The internal compensation has been designed to be stable with up to 50 nH of inductance in the second stage

filter. To achieve low ripple, the second L-C filter requires only 5-nH to 10-nH inductance. The inductance can be

estimated from the ferrite bead impedance specification at 100 MHz, with the assumption that the inductance is

similar at the selected converter switching frequency of 1 MHz or 2.2 MHz, and can be verified through tools

available on some manufacturer websites. The inductance of a ferrite bead is calculated using Equation 7:

2

Z

L

f

S

u u

(7)

where

• Z is the impedance of the ferrite bead in ohms at the specified frequency (usually 100 MHz)

• f is the specified frequency (usually 100 MHz)

8.2.2.2.5 Input Capacitor Selection

For the best output and input voltage filtering, X5R or X7R ceramic capacitors are recommended. The input bulk

capacitor minimizes input voltage ripple, suppresses input voltage spikes, and provides a stable system rail for

the device. A 10-μF or larger input capacitor is recommended. Having two in parallel further improves the input

voltage ripple filtering, minimizing noise coupling into adjacent circuits. The voltage rating of the cap must also

be taken into consideration, and must provide the required 5-μF minimum effective capacitance after DC bias

derating.

In addition to the bulk input cap, a smaller cap must be placed directly from the VIN pin to the PGND pin to

minimize input loop parasitic inductance, thereby minimizing the high frequency noise of the device. The input

cap placement affects the output noise, so care needs to be taken in placing both the bulk cap and bypass caps

as shown in Section 10.2. Table 8-7 lists recommended input capacitors.

Table 8-7. Recommended Input Capacitors

INPUT CAP TYPE

CAPACITOR VALUE

MANUFACTURER

VOLTAGE RATING (V)

PACKAGE SIZE

Bulk Cap

10 μF, X7S

TDK

C2012X7S1E106K125AC

25

0805

Bypass Cap

2.2 nF, X7R

Murata

GRM155R71E222KA01D

25

0402

8.2.2.2.6 Setting the Output Voltage

Choose resistors R1 and R2 to set the output voltage within a range of 0.8 V to 5.5 V, according to Equation 8.

To keep the feedback network robust from noise, and to reduce the self-generated noise of resistors, set R2

equal to or lower than 5 kΩ. Lower values of FB resistors achieve better noise immunity, and lower light load

efficiency, as explained in the Design Considerations for a Resistive Feedback Divider in a DC/DC Converter

Technical Brief.

OUT

OUT

FB

V

V

R1 = R2

1

= R2

1

V

0.8V

æ

ö

æ

ö

´

-

´

-

ç

÷

ç

÷

è

ø

è

ø

(8)

TPS62912, TPS62913

SLVSFP4 – AUGUST 2020

www.ti.com

24

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