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MCP3551-E/MS Datasheet(PDF) 15 Page - Microchip Technology |
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MCP3551-E/MS Datasheet(HTML) 15 Page - Microchip Technology |
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15 / 30 page ![]() © 2005 Microchip Technology Inc. DS21950B-page 15 MCP3551/3 4.5 Voltage Reference Input Pin The MCP3551/3 devices accept a single-ended external reference voltage, to be connected on the VREF input pin. Internally, the reference voltage for the ADC is a differential voltage with the non-inverting input connected to the VREF pin and the inverting input connected to the VSS pin. The value of the reference voltage is VREF - VSS and the common mode of the reference is always (VREF - VSS)/2. The MCP3551/3 devices accept a single-ended reference voltage from 0.1V to VDD. The converter output noise is dominated by thermal noise that is independent of the reference voltage. Therefore, the output noise is not significantly improved by lowering the reference voltage at the VREF input pin. However, a reduced reference voltage will significantly improve the INL performance since the INL max error is proportional to VREF 2 (see Figure 2-4). The charge and discharge of the input capacitor create dynamic input currents at the VREF input pin inversely proportional to the sampling capacitor, which is a func- tion of the input reference voltage. The typical value of the single-ended input impedance is 2.4 M Ω, with VDD =VREF = 5V. The DC leakage current caused by the ESD input diodes, though on the order of 1 nA typically, can cause additional gain error proportional to the source resistance at the VREF pin. 4.6 Power-On Reset (POR) The MCP3551/3 devices contain an internal Power-On Reset (POR) circuit that monitors power supply voltage VDD during operation. This circuit ensures correct device start-up at system power-up and power-down events. The POR has built-in hysteresis and a timer to give a high degree of immunity to potential ripple and noise on the power supplies, as well as to allow proper settling of the power supply during power-up. A 0.1 µF decoupling capacitor should be mounted as close as possible to the VDD pin, providing additional transient immunity. The threshold voltage is set at 2.2V, with a tolerance of approximately ±5%. If the supply voltage falls below this threshold, the MCP3551/3 devices will be held in a reset condition or in Shutdown mode. When the part is in Shutdown mode, the power consumption is less than 1 µA. The typical hysteresis value is around 200 mV in order to prevent reset during brown-out or other glitches on the power supply. Once a power-up event has occurred, the device must require additional time before a conversion can take place. During this time, all internal analog circuitry must settle before the first conversion can occur. An internal timer counts 32 internal clock periods before the internal oscillator can provide clock to the conversion process. This allows all internal analog circuitry to settle to their proper operating point. This timing is typically less than 300 µs, which is negligible compared to one conversion time (72.7 ms for the MCP3551). Figure 4-4 illustrates the conditions for a power-up and power-down event under typical start-up conditions. FIGURE 4-4: Power-On Reset Operation. 4.7 Shutdown Mode When not internally converting, the two modes of operation for the MCP3551/3 devices are the Shutdown and Sleep modes. During Shutdown mode, all internal analog circuitry, including the POR, is turned off and the device consumes less than 1 µA. When exiting Shutdown mode, the device must require addi- tional time before a conversion can take place. During this time, all internal analog circuitry must settle before the first conversion can occur. An internal timer counts 32 internal clock periods before the internal oscillator can provide clock to the conversion process. This allows all internal analog circuitry to settle to their proper operating point. This timing is typically less than 300 µs, which is negligible compared to one conversion time (72.7 ms for MCP3551). 4.8 Sleep Mode During Sleep mode, the device is not converting and is awaiting data retrieval; the internal analog circuitry is still running and the device typically consumes 10 µA. In order to restart a conversion while in Sleep mode, toggling CS to a logic-high (placing the part in Shut- down mode) and then back to a logic-low will restart the conversion. Sleep can only be entered in Single Conversion mode. Once a conversion is complete in Single Conversion mode, the device automatically enters Sleep mode. VDD 2.2V 2.0V 0V Reset Normal Operation Reset Start-up Time 300 µs |
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