AM29N323D datasheet(2/48 Pages) AMD

2 / 48 page

This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This Data

Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.

Publication# 23476N Rev: B Amendment/+9

Issue Date: August 8, 2002

Refer to AMD’s Website (www.amd.com) for the latest information.

Am29N323D

32 Megabit (2 M x 16-Bit)

CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory

DISTINCTIVE CHARACTERISTICS

■ Single 1.8 volt read, program and erase (1.7 to

1.9 volt)

■ Multiplexed Data and Address for reduced I/O

count

— A0–A15 multiplexed as D0–D15

— Addresses are latched with AVD# control inputs

while CE# low

■ Simultaneous Read/Write operation

— Data can be continuously read from one bank

while executing erase/program functions in

other bank

— Zero latency between read and write operations

■ Read access times at 40 MHz

— Burst access times of 20 ns @ 30 pF

at industrial temperature range

— Asynchronous random access times

of 110 ns @ 30 pF

— Synchronous random access times

of 120 ns @ 30 pF

■ Burst length

— Continuous linear burst

■ Power dissipation (typical values, 8 bits

switching, CL = 30 pF)

— Burst Mode Read: 25 mA

— Simultaneous Operation: 40 mA

— Program/Erase: 15 mA

— Standby mode: 0.2 µA

■ Sector Architecture

— Eight 4 Kword sectors and sixty-three sectors of

32 Kwords each

— Bank A contains the eight 4 Kword sectors and

fifteen 32 Kword sectors

— Bank B contains forty-eight 32 Kword sectors

■ Sector Protection

— Software command sector locking

— WP# protects the last two boot sectors

— All sectors locked when VPP = VIL

■ Software command set compatible with JEDEC

42.4 standards

— Backwards compatible with Am29F and

Am29LV families

■ Minimum 1 million erase cycle guarantee

per sector

■ 20-year data retention at 125

°C

— Reliable operation for the life of the system

■ Embedded Algorithms

— Embedded Erase algorithm automatically

preprograms and erases the entire chip or any

combination of designated sectors

— Embedded Program algorithm automatically

writes and verifies data at specified addresses

■ Data# Polling and toggle bits

— Provides a software method of detecting

program and erase operation completion

■ Erase Suspend/Resume

— Suspends an erase operation to read data from,

or program data to, a sector that is not being

erased, then resumes the erase operation

■ Hardware reset input (RESET#)

— Hardware method to reset the device for reading

array data

■ CMOS compatible inputs, CMOS compatible

outputs

■ Low VCC write inhibit

■ Package Option

— 47-ball FBGA

AM29N323D Datasheet(PDF) 2 Page - Advanced Micro Devices

AM29N323D Datasheet(HTML) 2 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48

Datasheet Download

Link URL