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TMP91C630F Datasheet(PDF) 21 Page - Toshiba Semiconductor |
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TMP91C630F Datasheet(HTML) 21 Page - Toshiba Semiconductor |
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21 / 202 page ![]() TMP91C630 2003-07-22 91C630-19 3.4.5 Standby Controller (1) HALT modes When the HALT instruction is executed, the operating mode switches to IDLE2, IDLE1 or STOP mode, depending on the contents of the SYSCR2<HALTM1:0> register. The subsequent actions performed in each mode are as follows: a. IDLE2: The CPU only is halted. In IDLE2 mode internal I/O operations can be performed by setting the following registers. Table 3.4.1 shows the registers of setting operation during IDLE2 mode. Table 3.4.1 The Registers of Setting Operation during IDLE2 Mode Internal I/O SFR TMRA01 TA01RUN<I2TA01> TMRA23 TA23RUN<I2TA23> TMRA45 TA45RUN<I2TA45> TMRB0 TB0RUN<I2TB0> SIO0 SC0MOD1<I2S0> SIO1 SC1MOD1<I2S0> AD converter ADMOD1<I2AD> WDT WDMOD<I2WDT> b. IDLE1: Only the oscillator to operate. c. STOP: All internal circuits stop operating. The operation of each different HALT mode is described in Table 3.4.2. Table 3.4.2 I/O Operation during HALT Modes HALT Mode IDLE2 IDLE1 STOP SYSCR2 <HALTM1:0> 11 10 01 CPU Stop I/O ports Maintain same state as when HALT instruction was executed. See Table 3.4.5 TMRA, TMRB SIO AD converter WDT Can be selected Block Interrupt controller Operational Stopped |
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