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STM32G031F6U6TR Datasheet(PDF) 19 Page - STMicroelectronics

Part # STM32G031F6U6TR
Description  Arm® Cortex®-M0 32-bit MCU, up to 64 KB Flash, 8 KB RAM, 2x USART, timers, ADC, comm. I/Fs, 1.7-3.6V
PDF  117 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G031F6U6TR Datasheet(HTML) 19 Page - STMicroelectronics

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DS12992 Rev 2
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STM32G031x4/x6/x8
Functional overview
31
In VBAT mode, the RTC domain is supplied from VBAT pin. The power source can be, for
example, an external battery or an external supercapacitor. Two anti-tamper detection pins
are available.
The RTC domain can also be supplied from VDD/VDDA pin.
By means of a built-in switch, an internal voltage supervisor allows automatic switching of
RTC domain powering between VDD and voltage from VBAT pin to ensure that the supply
voltage of the RTC domain (VBAT) remains within valid operating conditions. If both voltages
are valid, the RTC domain is supplied from VDD/VDDA pin.
An internal circuit for charging the battery on VBAT pin can be activated if the VDD voltage is
within a valid range.
Note:
External interrupts and RTC alarm/events cannot cause the microcontroller to exit the VBAT
mode, as in that mode the VDD is not within a valid range.
3.8
Interconnect of peripherals
Several peripherals have direct connections between them. This allows autonomous
communication between peripherals, saving CPU resources thus power supply
consumption. In addition, these hardware connections allow fast and predictable latency.
Depending on peripherals, these interconnections can operate in Run, Sleep and Stop
modes.
Table 4. Interconnect of STM32G031x4/x6/x8 peripherals
Interconnect source
Interconnect
destination
Interconnect action
TIMx
TIMx
Timer synchronization or chaining
Y
Y
-
ADCx
Conversion triggers
Y
Y
-
DMA
Memory-to-memory transfer trigger
Y
Y
-
ADCx
TIM1
Timer triggered by analog watchdog
Y
Y
-
RTC
TIM16
Timer input channel from RTC events
Y
Y
-
LPTIMERx
Low-power timer triggered by RTC
alarms or tampers
YY
Y
All clocks sources (internal
and external)
TIM14,16,17
Clock source used as input channel for
RC measurement and trimming
YY
-
CSS
RAM (parity error)
Flash memory (ECC error)
PVD
TIM1,16,17
Timer break
Y
Y
-
CPU (hard fault)
TIM1,16,17
Timer break
Y
-
-



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