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STM32L552CCT3PTR Datasheet(PDF) 194 Page - STMicroelectronics |
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STM32L552CCT3PTR Datasheet(HTML) 194 Page - STMicroelectronics |
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194 / 340 page ![]() Table 74. Current consumption in Run mode, code with data processing running from SRAM1, and power supplied by external SMPS Symbol Parameter Conditions(1) TYP Unit TYP Unit - VDD12 fHCLK code 25°C 25°C IDD(Run) Supply current in Run mode fHCLK = fHSE up to 48MHz included, bypass mode PLL ON above 48 MHz all peripherals disabled VDD12=1.00V fHCLK=26MHz Reduced code 1.22 mA 46.92 µA/MHz Coremark 0.57 21.92 Dhrystone2.1 1.26 48.46 Fibonacci 1.31 50.38 While(1) 1.43 55 VDD12=1.10V fHCLK=26MHz Reduced code 1.48 mA 56.92 µA/MHz Coremark 0.69 26.54 Dhrystone2.1 1.52 58.46 Fibonacci 1.59 61.15 While(1) 1.73 66.54 fHCLK=80MHz Reduced code 4.18 mA 52.25 µA/MHz Coremark 1.84 23 Dhrystone2.1 4.29 53.63 Fibonacci 4.5 56.25 While(1) 5.01 62.63 VDD12=1.20V fHCLK=110MHz Reduced code 6.81 mA 61.91 µA/MHz Coremark 2.97 27 Dhrystone2.1 7 63.64 Fibonacci 7.34 66.73 While(1) 8.19 74.45 1. All values are obtained by calculation based on measurements done with internal voltage regulator and using following parameters: SMPS input = 3.3 V, SMPS efficiency = 85%. |
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