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STM32L552CCT3PTR Datasheet(PDF) 283 Page - STMicroelectronics |
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STM32L552CCT3PTR Datasheet(HTML) 283 Page - STMicroelectronics |
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283 / 340 page  DS12737 Rev 6 283/340 STM32L552xx Electrical characteristics 307 Figure 57. Asynchronous multiplexed PSRAM/NOR read waveforms Table 135. Asynchronous non-multiplexed SRAM/PSRAM/NOR write-NWAIT timings(1) 1. Guaranteed by characterization results, not tested in production. Symbol Parameter Min Max Unit tw(NE) FMC_NE low time 9THCLK-0.5 9THCLK+1.5 ns tw(NWE) FMC_NWE low time 6THCLK-0.5 6THCLK+1 tsu(NWAIT_ NE) FMC_NWAIT valid before FMC_NEx high 7THCLK+13 - th(NE_NWA IT) FMC_NEx hold time after FMC_NWAIT invalid 5THCLK+13 - NBL Data FMC_ NBL[1:0] FMC_ AD[15:0] tv(BL_NE) th(Data_NE) Address FMC_ A[25:16] tv(A_NE) FMC_NWE t v(A_NE) MS32755V1 Address FMC_NADV t v(NADV_NE) tw(NADV) tsu(Data_NE) th(AD_NADV) FMC_ NE FMC_NOE tw(NE) tw(NOE) tv(NOE_NE) t h(NE_NOE) th(A_NOE) th(BL_NOE) tsu(Data_NOE) th(Data_NOE) FMC_NWAIT tsu(NWAIT_NE) th(NE_NWAIT) |
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