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STM32L552CCT3PTR Datasheet(PDF) 282 Page - STMicroelectronics

Part # STM32L552CCT3PTR
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
PDF  340 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L552CCT3PTR Datasheet(HTML) 282 Page - STMicroelectronics

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Electrical characteristics
STM32L552xx
282/340
DS12737 Rev 6
Figure 56. Asynchronous non-multiplexed SRAM/PSRAM/NOR write waveforms
Table 134. Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings(1)
1. Guaranteed by characterization results, not tested in production.
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
4THCLK-0.5
4THCLK+1
Ns
tv(NWE_NE)
FMC_NEx low to FMC_NWE low
THCLK-0.5
THCLK +1
-
tw(NWE)
FMC_NWE low time
THCLK-0.5
THCLK+1
th(NE_NWE)
FMC_NWE high to FMC_NE high hold
time
2THCLK-0.5
-
tv(A_NE)
FMC_NEx low to FMC_A valid
-
0
th(A_NWE)
Address hold time after FMC_NWE high
2THCLK-1
-
tv(BL_NE)
FMC_NEx low to FMC_BL valid
-
THCLK
th(BL_NWE)
FMC_BL hold time after FMC_NWE high
2THCLK-0.5
-
tv(Data_NE)
FMC_NEx low to Data valid
-
THCLK+3
th(Data_NWE)
Data hold time after FMC_NWE high
2THCLK+1
-
tv(NADV_NE)
FMC_NEx low to FMC_NADV low
-
1
tw(NADV)
FMC_NADV low time
-
THCLK+ 1.5
NBL
Data
FMC_NEx
FMC_NBL[1:0]
FMC_D[15:0]
tv(BL_NE)
th(Data_NWE)
FMC_NOE
Address
FMC_A[25:0]
tv(A_NE)
tw(NWE)
FMC_NWE
tv(NWE_NE)
t h(NE_NWE)
th(A_NWE)
th(BL_NWE)
tv(Data_NE)
tw(NE)
MS32754V1
FMC_NADV (1)
t v(NADV_NE)
tw(NADV)
FMC_NWAIT
tsu(NWAIT_NE)
th(NE_NWAIT)



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