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STM32L552CCT3PTR Datasheet(PDF) 303 Page - STMicroelectronics

Part # STM32L552CCT3PTR
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
PDF  340 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L552CCT3PTR Datasheet(HTML) 303 Page - STMicroelectronics

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DS12737 Rev 6
303/340
STM32L552xx
Electrical characteristics
307
Figure 70. OCTOSPI HyperBus read
Figure 71. OCTOSPI HyperBus read with double latency
Figure 72. OCTOSPI HyperBus write
MSv47733V1
CS#
tACC = Initial Access
Latency Count
Command-Address
47:40
39:32
31:24
23:16
15:8
7:0
Dn
A
Dn
B
Dn+1
A
Dn+1
B
Host drives DQ[7:0] and Memory drives RWDS
CK, CK#
RWDS
DQ[7:0]
Memory drives DQ[7:0] and RWDS
tw(CS)
tv(RWDS)
tv(CK)
tv(DS)
tv(DQ)
th(CK)
th(DS)
tv(OUT)
th(OUT)
th(DQ)
ts(DQ)
MSv49351V1
CS#
t
RWR =Read Write Recovery
t
ACC
= Access
Additional Latency
Command-Address
47:40 39:32 31:24 23:16
15:8
7:0
High = 2x Latency Count
Low = 1x Latency Count
Dn
A
Dn
B
Dn+1
A
Dn+1
B
Host drives DQ[7:0] and Memory drives RWDS
and RWDS
RWDS and Data
are edge aligned
CK, CK#
RWDS
DQ[7:0]
Memory drives DQ[7:0]
tCKDS
MSv47734V1
CS#
Access Latency
Latency Count
Command-Address
47:40
39:32
31:24
23:16
15:8
7:0
Dn
A
Dn
B
Dn+1
A
Dn+1
B
Host drives DQ[7:0] and Memory drives RWDS
Host drives DQ[7:0] and RWDS
CK, CK#
RWDS
DQ[7:0]
tw(CS)
tv(RWDS)
tv(CK)
th(CK)
High = 2x Latency Count
Low = 1x Latency Count
Read Write Recovery
th(OUT)
tv(OUT)
th(OUT)
tv(OUT)
th(OUT)
tv(OUT)



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