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STM32L552CCT3PTR Datasheet(PDF) 338 Page - STMicroelectronics

Part # STM32L552CCT3PTR
Description  Ultra-low-power Arm® Cortex®-M33 32-bit MCUTrustZone®FPU, 165 DMIPS, up to 512 KB Flash memory, 256 KB SRAM, SMPS
PDF  340 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L552CCT3PTR Datasheet(HTML) 338 Page - STMicroelectronics

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Revision history
STM32L552xx
338/340
DS12737 Rev 6
14-May-2020
4 (continued)
Added:
– Table 28: SMPS modes summary
– Table 29: SMPS characteristics
– Table 62: Current consumption in Run mode, code
with data processing running from Flash in single
bank, ICACHE ON in 2-way and power supplied by
external SMPS.
– Table 63: Current consumption in Run mode, code
with data processing running from Flash in single
bank, ICACHE ON in 1-way and power supplied by
external SMPS.
– Table 64: Current consumption in Run mode, code
with data processing running from Flash in single
bank, ICACHE disabled and power supplied by
external SMPS.
– Table 65: Current consumption in Run mode, code
with data processing running from Flash in dual bank,
ICACHE on in 2-way and power supplied by external
SMPS.
– Table 66: Current consumption in Run mode, code
with data processing running from Flash in dual bank,
ICACHE on in 1-way and power supplied by external
SMPS.
– Table 67: Current consumption in Run mode, code
with data processing running from Flash in dual bank,
ICACHE disabled and power supplied by external
SMPS.
– Table 68: Current consumption in Run mode, code
with data processing running from SRAM1, and power
supplied by external SMPS.
– Table 69: Current consumption in Run mode, code
with data processing running from SRAM2, and power
supplied by external SMPS.
– Table 70: Current consumption in Sleep mode, Flash
ON and power supplied by external SMPS.
– Table 71: Current consumption in Run mode, code
with data processing running from Flash, ICACHE on
(2-way) and power supplied by external SMPS.
– Table 72: Current consumption in Run mode, code
with data processing running from Flash, ICACHE on
(1-way) and power supplied by external SMPS.
– Table 73: Current consumption in Run mode, code
with data processing running from Flash, ICACHE
disabled and power supplied by external SMPS.
– Table 74: Current consumption in Run mode, code
with data processing running from SRAM1, and power
supplied by external SMPS.
– Table 75: Current consumption in Run mode, code
with data processing running from SRAM2, and power
supplied by external SMPS.
Table 164. Document revision history
Date
Revision
Changes



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