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STM32L552CCI3PTR Datasheet(PDF) 76 Page - STMicroelectronics |
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STM32L552CCI3PTR Datasheet(HTML) 76 Page - STMicroelectronics |
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76 / 340 page  Functional overview STM32L552xx 76/340 DS12737 Rev 6 • Up to 16 slots available with configurable size and with the possibility to select which ones are active in the audio frame. • Number of bits by frame may be configurable. • Frame synchronization active level configurable (offset, bit length, level). • First active bit position in the slot is configurable. • LSB first or MSB first for data transfer. • Mute mode. • Stereo/Mono audio frame capability. • Communication clock strobing edge configurable (SCK). • Error flags with associated interrupts if enabled respectively. – Overrun and underrun detection. – Anticipated frame synchronization signal detection in slave mode. – Late frame synchronization signal detection in slave mode. – Codec not ready for the AC’97 mode in reception. • Interruption sources when enabled: –Errors. – FIFO requests. • DMA interface with two dedicated channels to handle access to the dedicated integrated FIFO of each SAI audio sub-block. 3.38 Secure digital input/output and MultiMediaCards Interface (SDMMC) The SD/SDIO, MultiMediaCard (MMC) host interface (SDMMC) provides an interface between the AHB bus and SD memory cards, SDIO cards and MMC devices. Table 19. SAI implementation SAI features(1) 1. X: supported SAI1 SAI2 I2S, LSB or MSB-justified, PCM/DSP, TDM, AC’97 X X Mute mode X X Stereo/Mono audio frame capability. X X 16 slots X X Data size configurable: 8-, 10-, 16-, 20-, 24-, 32-bit X X FIFO size X (8 Word) X (8 Word) SPDIF X X PDM X - |
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