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Data Sheet

ADPA7004CHIPS

Rev. 0 | Page 3 of 20

SPECIFICATIONS

40 GHz TO 45 GHz FREQUENCY RANGE

Die bottom temperature (TDIEBOTTOM) = 25°C, drain bias voltage (VDD) = VDD1A and VDD1B = VDD2A and VDD2B = VDD3A and VDD3B = VDD4A

and VDD4B = 3.5 V, and IDQ1x + IDQ2x+ IDQ3x + IDQ4x = 550 mA, unless otherwise noted. Note that IDQ1x, IDQ2x, IDQ3x, and IDQ4x are the IDQ

for VDD1x, VDD2x, VDD3x, VDD4x, respectively, where x stands for A and B. Adjust VGG1234A from −1.5 V to 0 V to achieve the desired

supply current (IDQ). The typical gate bias voltage (VGG) = −0.4 V for IDQ = 550 mA.

Table 1.

Parameter

Symbol Min Typ

Max Unit

Test Conditions/Comments

FREQUENCY RANGE

GHz

GAIN

Gain Variation over Temperature

0.023

dB/°C

RETURN LOSS

Input

S11

Output

S22

OUTPUT

Output Power for 1 dB Compression

P1dB

21.5

dBm

Saturated Output Power

PSAT

23.5

dBm

Output Third-Order Intercept

IP3

30.5

dBm

Output power (POUT) per tone = 12 dBm with 1 MHz

tone spacing

SUPPLY

Current

IDQ

550

Adjust VGG to achieve IDQ = 550 mA typical

Voltage

VDD

3.5

45 GHz TO 75 GHz FREQUENCY RANGE

TDIEBOTTOM = 25°C, VDD = VDD1A and VDD1B = VDD2A and VDD2B = VDD3A and VDD3B = VDD4A and VDD4B = 3.5 V and IDQ1x + IDQ2x+ IDQ3x +

IDQ4x = 550 mA, unless otherwise noted. Adjust VGG1234A from −1.5 V to 0 V to achieve the desired IDQ. The typical VGG = −0.4 V for

IDQ = 550 mA.

Table 2.

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions/Comments

FREQUENCY RANGE

GHz

GAIN

18.5

Gain Variation over Temperature

0.023

dB/°C

RETURN LOSS

Input

S11

20.0

Output

S22

22.0

OUTPUT

Output Power for 1 dB Compression

P1dB

22.0

dBm

Saturated Output Power

PSAT

24.0

dBm

Output Third-Order Intercept

IP3

31.0

dBm

POUT per tone = 12 dBm with 1 MHz tone spacing

Current

IDQ

550

Adjust VGG to achieve IDQ = 550 mA typical

Voltage

VDD

3.5

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