IMXRT1024IEC datasheet(3/90 Pages) NXP

3 / 90 page

i.MX RT1024 introduction

i.MX RT1024 Crossover Processors Data Sheet for Industrial Products, Rev. 0, 11/2020

NXP Semiconductors

– Periodical interrupt generation

—Two Quad Timers

– 4-channel generic 16-bit resolution timer each

– Each support standard capture and compare operation

– Quadrature decoder integrated

— Two FlexPWMs

– Up to 8 individual PWM channels per each

– 16-bit resolution PWM suitable for Motor Control applications

— Two Quadrature Encoders/Decoders

Each i.MX RT1024 processor enables the following interfaces to external devices (some of them are

muxed and not available simultaneously):

•

Audio:

— S/PDIF input and output

— Three synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and

codec/DSP interfaces

— MQS interface for medium quality audio via GPIO pads

•

Connectivity:

— One USB 2.0 OTG controller with integrated PHY interface

— Two Ultra Secure Digital Host Controller (uSDHC) interfaces

– MMC 4.5 compliance support up to 100 MB/sec

– SD/SDIO 3.0 compliance with 200 MHz SDR signaling to support up to 100 MB/sec

– Support for SDXC (extended capacity)

— One 10M/100M Ethernet controller with IEEE1588 supported

— Eight universal asynchronous receiver/transmitter (UARTs) modules

— Four I2C modules

— Four SPI modules

— Two FlexCAN modules

•

GPIO and Pin Multiplexing:

— General-purpose input/output (GPIO) modules with interrupt capability

— Input/output multiplexing controller (IOMUXC) to provide centralized pad control

— 90 GPIOs for 144-pin LQFP package

— One FlexIO

The i.MX RT1024 processors integrate Analog module:

— Two Analog-Digital-Converters (ADC), one of which supports differential inputs, up to 19

channels

— Four Analog Comparators (ACMP)

The i.MX RT1024 processors integrate advanced power management unit and controllers:

•

Full PMIC integration, including on-chip DCDC and LDOs

IMXRT1024IEC Datasheet(PDF) 3 Page - NXP Semiconductors

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