TMUX7208_V01 datasheet(29/51 Pages) TI

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VDD

VSS

VDD

VSS

0.1 µF

GND

Output

250 mV

0 V

tPD 1

Output

0 V

tProp Delay = max ( tPD 1, tPD 2)

Input

(VS)

tr < 40ps

tf < 40ps

tPD 2

50%

Figure 8-8. Propagation Delay Measurement Setup

8.9 Charge Injection

The TMUX7208 has a transmission-gate topology. Any mismatch in capacitance between the NMOS and PMOS

transistors results in a charge injected into the drain or source during the falling or rising edge of the gate signal.

The amount of charge injected into the source or drain of the device is known as charge injection, and is denoted

by the symbol QINJ. Figure 8-9 shows the setup used to measure charge injection from source (Sx) to drain (D).

VDD

VSS

VDD

VSS

0.1 µF

GND

VEN

VOUT

Output

0 V

3 V

VEN

QINJ = CL ×

VOUT

tr < 20 ns

tf < 20 ns

Output

N.C.

Figure 8-9. Charge-Injection Measurement Setup

8.10 Off Isolation

Off isolation is defined as the ratio of the signal at the drain pin (D) of the device when a signal is applied to

the source pin (Sx) of an off-channel. Figure 8-10 shows the setup used to measure, and the equation used to

calculate off isolation.

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TMUX7208, TMUX7209

SCDS418B – JULY 2020 – REVISED APRIL 2021

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