PIN

NAME

FUNCTION

7

SS

Soft-Start Input. Connect a capacitor from SS to SGND to set the soft-start time.

8

EN/UVLO

Enable/Undervoltage-Lockout Input. Connect a resistor from EN/UVLO to SGND to set the UVLO

threshold. By default, the module is enabled with the EN/UVLO pin open.

9, 28

IN

Power-Supply Input. Decouple to PGND with a capacitor; place the capacitor close to the IN and

PGND pins.

10, 14-21,

27

PGND

Power Ground

11

EXTVCC

External Power Supply Input for the Internal LDO. Applying a voltage between 4.7V and 24V at the

EXTVCC pin bypasses the internal LDO and improves efficiency.

12

BST

Boost Flying Capacitor Node. Internally a 0.1μF is connected from BST to LX. Do not connect any

external components to the BST pin.

13

LX

Switching Node. Leave unconnected; do not connect any external components to the LX pin.

22-25

OUT

Regulator Output Pin. Connect a capacitor from OUT to PGND.

26

DL

Gate Drive for Low-Side MOSFET. Do not connect any external components to the DL pin.

29

MODE/

SYNC

MODE Pin Configures the Part to Operate in PWM, PFM, or DCM Modes of Operation. Leave MODE

unconnected for PFM operation (pulse skipping at light loads). Connect MODE to SGND for

The device can be synchronized to an external clock using this pin. See the Mode Selection (MODE)

section for more details.

EP1, EP2,

EP3

—

Exposed Pad. Create a large copper plane below the module connecting EP1, EP2, and EP3 to

improve heat dissipation capability. PGND and SGND are shorted through this plane.

Pin Description (continued)

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Maxim Integrated │ 13

MAXM17536

4.5V to 60V, 4A High-Efficiency, DC-DC Step-Down

SiP Power Module with Integrated Inductor