M50FLW040A datasheet(45/52 Pages) STMICROELECTRONICS

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M50FLW040A, M50FLW040B

Figure 23. Double/Quadruple Byte Program Flowchart and Pseudo code (FWH Mode Only)

Note: 1. A Status check of SR3 (VPP Invalid) and SR4 (Program Error) can be made after each program operation by following the correct

command sequence.

2. If an error is found, the Status Register must be cleared before further Program/Erase operations.

3. A0 and/or A1 are treated as Don’t Care (A0 for Double Byte Program and A1-A0 for Quadruple Byte Program).

For Double Byte Program: Starting at the Start Address, the first data Byte is programmed at the even address, and the second at

the odd address.

For Quadruple Byte Program: Starting at the Start Address, the first data Byte is programmed at the address that has A1-A0 at 00,

the second at the address that has A1-A0 at 01, the third at the address that has A1-A0 at 10, and the fourth at the address that

has A1-A0 at 11.

AI08423B

Read Status

YES

SR7 = 1

YES

SR3 = 0

SR4 = 0

VPP Invalid

Error (1, 2)

Program

Error (1, 2)

Double/Quadruple Byte Program command:

– write 40h or 10h

– write Start Address and 2/4 Data Bytes (3)

(memory enters read status state after

the Double/Quadruple Byte Program command)

do:

– Read Status Register

– If SR7=0 and a Program/Erase Suspend

command has been executed

– SR7 is set to 1

– Enter suspend program loop

If SR3 = 1, VPP invalid error:

– error handler

If SR4 = 1, Program error:

– error handler

Suspend

Loop

YES

Write 40h or 10h

Start

Write Start Address

and 2/4 Data Bytes (3)

YES

End

YES

SR1 = 0

Program to Protected

Block Error (1, 2)

If SR1 = 1,

Program to protected block error:

– error handler

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