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MCP6V26 Datasheet(PDF) 21 Page - Microchip Technology |
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MCP6V26 Datasheet(HTML) 21 Page - Microchip Technology |
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21 / 50 page ![]() © 2011 Microchip Technology Inc. DS25007B-page 21 MCP6V26/7/8 4.0 APPLICATIONS The MCP6V26/7/8 family of auto-zeroed op amps are manufactured using Microchip’s state-of-the-art CMOS process. This family is designed for low cost, low power and high precision applications. Its low supply voltage, low quiescent current and wide bandwidth make the MCP6V26/7/8 devices ideal for battery-powered appli- cations. 4.1 Overview of Auto-Zeroing Operation Figure 4-1 shows a simplified diagram of the MCP6V26/7/8 auto-zeroed op amps. This will be used to explain how the DC voltage errors are reduced in this architecture. FIGURE 4-1: Simplified Auto-Zeroed Op Amp Functional Diagram. 4.1.1 BUILDING BLOCKS The Null Amplifier and Main Amplifier are designed for high gain and accuracy using a differential topology. They have a main input pair (+ and - pins at their top left) used for the signal. They have an auxiliary input pair (+ and - pins at their bottom left) used for correcting the offset voltages. Both input pairs are added together internally. The capacitors at the auxiliary inputs (CFW and CH) hold the corrected values during normal operation. The Output Buffer is designed to drive external loads at the VOUT pin. It also produces a single-ended output voltage (VREF is an internal reference voltage). All of these switches are make-before-break in order to minimize glitch-induced errors. They are driven by two clock phases ( φ1 and φ2) that select between normal mode and auto-zeroing mode. The clock is derived from an internal R-C oscillator running at a rate of fOSC1 = 850 kHz. The oscillator’s output is divided down to the desired rate. The internal POR ensures the part starts up in a known good state. It also provides protection against power supply brown-out events. The Digital Control circuitry takes care of all of the housekeeping details of the switching operation. It also takes care of POR events. VIN+ VIN– Main Output VOUT VREF Amp. Buffer NC Null Amp. Null Input φ1 Switches Null Correct φ2 Switches Null Output Switches CH CFW POR Digital Control Oscillator φ1 φ2 |
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