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MCP37D21T-80E/TE Datasheet(PDF) 20 Page - Microchip Technology |
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MCP37D21T-80E/TE Datasheet(HTML) 20 Page - Microchip Technology |
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20 / 141 page  2020 Microchip Technology Inc. DS20006382A-page 20 MCP37D31-80 AND MCP37D21-80 FIGURE 2-3: Timing Diagram - LVDS Output with MSb Byte First Option. This output option is available for 16-bit mode only. CLK- CLK+ S-1 S S+1 S+L S+L-1 tA Latency = L Cycles tCPD tDC tPD DCLK- DCLK+ Q-[N:0] Q+[N:0] WCK/OVR- WCK/OVR+ b[15:8] S-L b[7:0] S-L b[15:8] S-L-1 b[7:0] S-L-1 b[15:8] S-L+1 b[15:8] S b[15:8] S-1 b[7:0] S-1 WCK S-L OVR S-L WCK S-L-1 OVR S-L-1 WCK S-L+1 WCK S WCK S-1 OVR S-1 Input Clock: CLK Output: Output Data: Word-CLK/ Over-Range Output: Input Signal: |
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