CDCDB800 datasheet(13/31 Pages) TI

Part #	CDCDB800

Description	CDCDB800 DB800ZL-Compliant 8-Output Clock Buffer for PCIe Gen 1 to Gen 5

PDF	31 Pages

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Manufacturer	TI [Texas Instruments]

Direct Link	http://www.ti.com

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13 / 31 page

8.4 Device Functional Modes

8.4.1 CKPWRGD_PD# Function

The CKPWRGD_PD# pin is used to set two state variables inside of the device: PWRGD and PD#. The PWRGD

and PD# variables control which functions of the device are active at any time, as well as the state of the input

and output pins.

The PWRGD and PD# states are multiplexed on the CKPWRGD_PD# pin. CKPWRGD_PD# must remain below

VOL and not exceed VDDR + 0.3 V until VDD and VDDR are present and within the recommended operating

conditions. After CKPWRGD_PD# is set high, a valid CLKIN must be present to use PD#.

The first rising edge of the CKPWRGD_PD# pin sets PWRGD = 1. After PWRGD is set to 1, the

CKPWRGD_PD# pin is used to assert PD# mode only. PWRGD variable will only be cleared to 0 with the

removal of VDD and VDDR.

PWRGD

PD#

CKPWRGD_PD#

VDD/VDDR

Figure 8-1. PWRGD and PD# State Changes

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CDCDB800

SNAS818 – JULY 2021

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CDCDB800 Datasheet(PDF) 13 Page - Texas Instruments