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MPF7100BVMA3ES Datasheet(PDF) 78 Page - NXP Semiconductors |
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MPF7100BVMA3ES Datasheet(HTML) 78 Page - NXP Semiconductors |
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78 / 125 page ![]() NXP Semiconductors PF7100 7-channel power management integrated circuit for high performance applications PF7100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 9 March 2021 78 / 125 aaa-034302 OV/UV TH Gen OV Hyst OV SW1_PG SW1 VMON UV Digital Filter PGOOD GENERATOR UV Hyst OTP_SW1OV_TH[1:0] VMON LOGIC CONTROL SW1FB OTP_SW1UV_TH[1:0] SW1VMON_EN Digital Filter OV/UV TH Gen OV Hyst OV SW4_PG SW4 VMON UV Digital Filter PGOOD GENERATOR UV Hyst OTP_SW4OV_TH[1:0] VMON LOGIC CONTROL SW4FB OTP_SW4UV_TH[1:0] SW4VMON_EN Digital Filter OV_TH UV_TH OV_TH UV_TH OV/UV TH Gen OV Hyst OV SW5_PG SW5 VMON UV Digital Filter PGOOD GENERATOR UV Hyst OTP_SW5OV_TH[1:0] MON_VREF VBG2 VMON LOGIC CONTROL SW5FB PGOOD OTP_SW5UV_TH[1:0] SW5VMON_EN Digital Filter OV_TH UV_TH OV/UV TH Gen OV Hyst OV LDO1_PG LDO1 VMON UV Digital Filter PGOOD GENERATOR UV Hyst OTP_LDO1OV_TH[1:0] MON_VREF VBG2 VMON LOGIC CONTROL LDO1OUT OTP_LDO1UV_TH[1:0] LDO1VMON_EN Digital Filter OV_TH UV_TH OV/UV TH Gen OV Hyst OV LDO2_PG LDO2 VMON UV Digital Filter PGOOD GENERATOR UV Hyst OTP_LDO2OV_TH[1:0] MON_VREF VBG2 VMON LOGIC CONTROL LDO2OUT OTP_LDO2UV_TH[1:0] LDO2VMON_EN Digital Filter OV_TH UV_TH Figure 31. Voltage monitoring architecture |
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